JLCPCB Design Rules .09mm .127mm .2mm

Greetings,

I’ve recently started playing around with KiCad. As a manufacturer I’ve used JLCPCB so far but I’ve never come close to pushing their manufacturing limits.
I’d like to do that now but their capabilities are a bit to specific for the KiCad DRC rules I think.
When using a 4 Layer board you can use a minimum track width and and spacing of .09mm for outer layer, but the minimum pad to pad clearance is .127mm and the minimum pad (with hole?) to track clearance is .2mm.
So far I’ve just set the Clearance in Net Classes to .2mm to to fit the pad to track clearances.
I know that I can override a specific footprint’s clearance in it’s Local Clearance Settings but I’d have to do that to every footprint manually (?) and I cannot do that to via pads.
I also cannot specify the via to via clearance which has to be .54mm. So far I’ve just measured that manually.

Is there a way to specify those, so I can lower the minimum clearance for tracks to .09mm?

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