Issue in two nets of different page (Global Nets)--- not connecting in PCB

I’ve SCL and SDA pins from one page connecting to another Page(uC) with two SAME Global net names (attached as an image).
But in PCB they are not connected to each other as in two different nets.

Did you check with the highlight tool in eeschema if they are connected? Do you get a clean ERC? Did you update the layout from schematic (if you still use the old netlist workflow then make sure you exported the netlist and that you import the correct one)

What do the IC pins show in Pcbnew?

Also, you probably need pullups on those I2C nets somewhere on the schematic.

I do not get any error while ERC.
Yes I’ve updated still the same issue.

Yes, it’s there on the schematic.

The pad labels look correct

I see both local and global labels.
Those do not connect even if they have the same name.

If they are on the same sheet like in the screenshot then they will connect. Plus in the screenshot the global and local labels are connected by a wire so even if they would not then they are connected by that route (one can argue that the local label is unnecessary here)

My guess is that ratsnest visibilty is turned off to be honest.

Probably the simplest way to give some decent advice is if you zip the whole project and upload it here. Then I, or someone else can have a look at it and try some things instead of guessing from screenshots.

If you want to keep your design “secret” then simly delete most of the design before uploading.

I’ve deleted Local names and tried But that didn’t help.
No They’re not on the same sheet that’s why I’ve used the Global names.
When I turn on the rats-net, It doesn’t show anything from this SCL SDA(which is from gauge), It only shows connection from controller to other sensor

@Lakshmi, this is the first thing you need to do. For both the schematic and layout.

Are you still using 5.99 version or did you move to 5.1.5?

I’m still using 5.99v

I tried to open PCB File in 5.1.5 It doesn’t allow me to open the PCB file. Gives some Line and offset error

That is to be expected. One of the reasons why nightlies are not a good idea is that the files generated by it might not be compatible with the stable version.

Yes it was a mistake.
In KiCAD 5.99 there’s no option to create netlist file.

File -> Export -> Export Netlist

Is there a particular reason why you want to use a potentially unstable development build? 5.99 is really for testing features and developing the software - you should not be at all surprised when stuff changes or breaks or is only partly implemented. Sure, if you find a problem a bug report is appreciated by the devs. If you are actually trying to develop a design, it probably isn’t a wise choice and you would be better using normal release 5.1.5 (or, possibly a new nightly as 5.1.6 will probably be released fairly soon i.e weeks/months). months
5.99 is the development version build that will become 6 in the fullness of time but probably > a year away. If there is a feature in 5.99 that you really need you might be best to develop the project in 5.1.5 and only when virtually complete, bring into 5.99 for whatever you need. As you have discovered importing into 5.99 is one way. (Unless you hack the files - and that’s not guaranteed when there is a further file format change)

@Lakshmi already mentioned above that it was a mistake. No need to remind them again.