Invalid footprint? CP_EIA-3216-18_Kemet-A

While designing board and having it reviewed, reviewer noticed that footprint doesn’t match vendor recommended land dimensions / courtyard.
First problem that link to pdf specified in footprint is expired, but i found it in another place, i upload it temporary to my github: https://raw.githubusercontent.com/nuclearcat/kicad-stuff/master/docs/KEM_TC101_STD.pdf
In footprint library of kicad distance from center of component to center of pad is 1.35mm (Position X).
As specified on page 24, table 2, for Case A, 3216-18 , parameter C is same, it match Density level B.

But next critical parameters seems completely incorrect. According to datasheet for Density level B:
Height of pad (X) 1.25
Width of pad(Y) 1.75
In KiCAD footprint height is Size Y (naming is more correct, but irrelevant now), and it is 1.35mm
Width is 1.4mm.

Does it means footprints need review and update?
What is the process of sending update? Just pull request to gitlab?

The generic footprints can never fully match every component. There is not one 3216 component. There is also not one suggested footprint for them. Every manufacturer and even every capacitor series of a given manufacturer has different tolerance levels for their measurements. Different datasheets are made at different times by use of the industry standards valid at that time (and sometimes even with “standards” developed by just this one manufacturer).
Which is why the official lib generates completely ignores the suggested footprints and generates all of them via the rules of IPC-7351B. But note that the footprint can of course only exactly fit one capacitor that way (the one whos datasheet is in the description of the footprint). This way of doing things however ensures consistency as different standards used for different datasheets are ignored (makes the footprints predictable for users).

The scripts by the way are found here: https://gitlab.com/kicad/libraries/kicad-footprint-generator/-/tree/master/scripts/SMD_chip_package_rlc-etc

And the size definition of the capacitor in question is this:

SMD_3216-18:
    code_metric: '3216-18'
    # size   | 3,2 x 1,6 x 1,8 mm
    code_letter: 'Kemet-A'
    #code_letter: 'AVX-A'
    body_length:
        nominal: 3.2
        tolerance: 0.2
    body_width:
        nominal: 1.6
        tolerance: 0.2
    #terminator_spacing_min:
    #terminator_spacing_max:
    terminal_length:
        nominal: 0.8
        tolerance: [0.3, 0.2]
    terminal_width:
        nominal: 1.2
        tolerance: 0.1
    ipc_reference: "ipc_spec_tantalumn"
    size_info: '(Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf)'

What i see is that the terminal length tolerance might be wrong here. The datasheet gives +/-0.3 while the data set above gives -0.3+0.2
And we should include a pointer to the page where the info is found (otherwise one searches way too long for it).

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Very impressive and detailed answer! Thank you very much. Now I don’t even know which footprint is better to use :slight_smile:

The last question, if i still ever make footprints according to the manufacturer’s specific recommendations (as far as I know, sometimes factories require such if there is responsibility for defects), will it be useful if I properly name/comment them and and send in pull request, or it make no sense and is it more reasonable to keep in my own repository on github? Like for example these caps have different footprints for different density, might save someone time.
Maybe there is some unified “user contributed” repository exist or planned? I think it will be handy to have such, instead of symbols/footprints scattered over private repositories.

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This is a difficult decision.

When in doubt I have decided to go with the KiCad official footprints. They are usually accepted by all the assemblers.

Along the years I have found that different assembly houses want different footprints for the very same package! I have not received suggestions/answers like “I want the 0402 pads a little bigger” or “please make the stencil for the fine pitch packages at 50%” from an assembler about a footprint from the official libraries.

Especially for small packages (like 0402) there might be issues. Two important parameters for the IPC calculation are the manufacturing tolerance and the assembly tolerance. The default tolerances are rather large for such small parts so one might need to modify them.

And especially of note for smaller or equal 0402: In addition to using IPC we also follow research with regards to paste handling (i don’t quite remember by whom). This in the end means we reduce the paste coverage and move it “inwards”.

What doesn’t help is when a datasheet states a known package (sot-23, SOD-323…) and then different suppliers have different physical lead dimensions and different recommended pad dimensions.

This is the one thing about PCB’s that I really don’t like… I am about to press go on having 4 cards fabricated and populated and I am on my 6th footprint to EXACT part I have ordered comparison to the point where I am re-measuring KiCAD’s footprints and comparing to the dimensions of the chips.

TI and Vishay are the worst for this with OnSemi and Analog aligning to the establish dimensions.
It’s amazing what will fit onto what as the foot so it’s usually ok

Courtyards depend on the details of the placement machines, so the same supplier may be a problem for one assembly house and not for another

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