Interesting BUG in Eeschema - Power Ports


Maybe this is a known issue, I don’t know.

One can ADD a power port by using the “a” HotKey. And then ALL the normal properties are allowed to be edited

Select the FIELD value, for a part that is just a visual display, then run the ERC with errors.

I was trying to figure out what exactly was wrong, but I got lost in my process; sorry about that.

Essentially, as I understand the issue at the moment, the DRC does not like power symbols added with the HotKeys with “a” selected as the HotKey, which then allows assignment of a footprint to a part that does not actually exist.

Any and all Power Symbols should have the footprint select field disabled in my opinion.

I’m sorry that I could not nail the actual operation of failed events any better.

Thanks for trying!


What is the error message? Did you add power flag already?


I’m not quite sure what you’re getting at. There is no “FIELD value,” but there is a field called VALUE.

Remember, Power Ports are specialist symbols. Their function is to define a global net with the name of the desired voltage rail.

Open one in the Symbol (Library Part) editor.

In the part properties, there is a checkbox: “Define as power symbol.” This is important.

Power symbols have one pin, of type Power In, not Power Out. Why not Power Out? Because it’s not a source of power. If you placed two +12V power ports on a schematic, and their pins were declared as Power Out, the ERC would rightly complain: two outputs connected together. Obviously that’s not what you want. So the pins are declared as Power In.

The power symbol Part Value is what differentiates one power port voltage from another. The symbol’s pin’s Pin Name should be the same as the Part Value, as it determines the name of the net to which the symbol is attached. Power Ports are global nets.

Of course there is no footprint associated with a Power Symbol. The netlist export from EESchema is smart enough to know that no footprint is associated with Power Symbols (see the “Define as power symbol” above), so when the netlist is imported into pcbnew, the power symbol isn’t even present as a part. Again, it only defines a global net.

One more thing. You draw your schematic, and you place a power connector on the board and then you put a +5V Power Symbol on one of the connector’s pins, and you place a GND power symbol on the other pin, and you use +5V and GND wherever they are need. And you run the ERC and it complains: “no power source” (or something similar). And that’s valid. Why? Because the connector pin probably isn’t declared as Power Output type (it’s probably Passive) because connectors can be used any which way.

The “fix” for this is the Power Flag symbol PWR_FLAG. It is a specialist symbol with its one pin declared as Power Output, and the ERC knows that it is the “source” of the supply on that net. It doesn’t define the net label, it is just a stand in for a “real” power source.


Just a clarification:
It’s the other way round. The pin name determines the resulting net name. (The value and symbol name should be the same so that the user of the symbol knows what they get.)


One CAN actually assign a footprint to the port in the properties window. Maybe this should be not allowed?

THANKS for this^^^ explanation! Simple and to the point.


Disallowing this is reasonable to me; I may propose it on the mailing list. Power components do not get exported to the PCB anyway so there is little use in assigning a footprint even if someone had come up with a contrived workflow where it might make “sense”