I’m designing USB-C PD to dc power jack circuit as my first project. I ran ERC check to see if there’s anything wrong and I see this part above VCCD being marked red.
I’ve verified that the mark is on the input of GND and not the pin of capacitor.
What’s weird is that it’s copied from datasheet’s example application board. and VDDD also has capacitors and it’s fine.
According to datasheet the VCCD line outputs 1.8v and it can be used as power supply. But I don’t need 1.8v so I just connected it to capacitor for decoupling.
What can I do to fix this error? Since it’s error and not warning I don’t think I should ignore it.
I know that capacitor is internally disconnected metal plates but I don’t see how this specific setup would be problematic.
ERC is not that clever. It doesn’t know the details of the chip you’re looking at or the details of how a capacitor works. All it knows is that there is a pin with type “input power pin” (the GND symbol) that doesn’t connect directly to a pin with type “output power pin”. This particular ERC check can be frustrating and many people turn it off.
Alternatively, you can add a “PWR FLAG” symbol to the GND net somewhere to promise to ERC that there is power on that net (or a place for return current to go, in this case). There are lots of examples of this across the forum.
I agree it does cause a bit of confusion 
and we all see it a lot (more than we want !) But I feel that we should not switch it off but continue to explain it 
I think your explanation is perfect @scone 
As you do point out the prefered solution. The OP is just getting into Kicad which is awesome but having GND pointing up is not a good start 
I would say to the OP to read the Kicad Docs and rethink the schematic and continue to listen to ‘The Scone’ 
That’s my 2 pence worth.
Read Getting Started once more as you must have missed the relevant chapter:
I agree. The OP is all ground up. 
15 years ago I had a manager who drew his ground symbols pointing in all 4 directions. Those of us who worked for him never liked it.
I do not know what to say other than it seems to be a matter of strong (and largely unchangeable) personal preference. Most of us also like schematics reading left input to right output.** It just makes everything more clear.
I WAS dissuaded years ago from making cross dot wire junctions. I see those on some of my old work and now strongly dislike seeing it anywhere.
Finally: I mostly have given up on using schematic ERC. I just do not find it to be worth the effort.
There’s no signigficance in the marker appearing at that capacitor. It could have have been put anywhere on the GND net. And it’s only reported once per net.
That error is very common. The reason is that the GND power symbol like all other power symbols contains a pin of type Power Input. Generally power nets, including GND, will need a PWR_FLAG unless it’s already connected to a Power Output pin such as a voltage regulator output, battery, or some power connectors.
Don’t try to explain it in terms of current flow or power flow. ERC is not doing any circuit analysis. It’s just looking for one thing in this check, that a net with one or more Power Input pins has also exactly one Power Output pin on it.
I did that because the power output pins were pointing upwards already and I figured shorter wires would look clean. Is it better to draw extra “curve” wires so that they point downwards?
I don’t mean to dictate too much as there are plenty of differences of opinion in how to draw a schematic.
For example I have worked with others who (mainly thinking of recent experience with LTSpice) like to stretch out the schematic so it has much longer wires. I am also reminded of working years ago on D size schematic diagram printouts with very long interconnects. The D sheet was much too big to lay flat on my desk, so working with that was a big waste of time. With a great reduction in wire length and maybe a slight reduction in symbol size, it could have been printed on a B sheet. To that end I prefer to pack the schematic more tightly (but not TOO tightly) than some other engineers, in order to be able to read as much of the schematic as possible without zooming and panning.
But to answer your question I guess the best way to represent my opinion is to provide a sample. I suppose that there is some added wire (and wire angles) in order to make my grounds face downward, but to me it does not seem like a big deal.
I suppose it would be more rigorous to make my power symbols all point up, but as you can see I am not doing that.
Someiimes you can rotate or mirror the symbol (X and Y hotkeys) for better positioned connections. You could even edit the symbol if the pins are too often in inconvenient locations. But eventually some compromise has to be made.
I think not.
Better is to arrange elements in that way that you can have this GND simply toward down without curve wires.
In your case (when you have planty of room at schematic) I would move C1,C3,C4 right-down. Connect 3V3 to their top pins. Connect together their bottom pins and put there one GND symbol toward down, such that GND text would be to the right of IC rectangle.
But in my schematics I prefer compactness over GNDs pointing down.
In most cases there is no problem to have GND down, but the problematic are supply pins on top if IC symbols.
My typical solution in the ‘like your’ case is something like this:
I would never had at top of symbol a pin needing only capacitor to GND (like your pin 24).
In more crowded region I use even GND pointing up. Like here:
For microcontroller family we started to use recently I decided to not have pins at top and bottom:
This allows me to have VCC up and GND down. Pin 30 needing only capacitor I located near GND pins.