In big designs I find it very unpractical to give the same net different names dependent on what layer it is. It could maybe work on a little design, but if you have a lot of signals going up and down the layers it is a nightmare..
The voltage range I am talking about is from 100V up to 1500V. So in my case, the pcb it self is voltage tested and approved to be used down to 0.5mm clearance on inner layers, but on the outer layers we must follow the "normal" distances. So in the case of 1000V that might be 8mm (reinforced). So it is a huge difference and mandatory on tight designs.
I have not used python scripting yet, but could this check been done there?