I wrote a PCBNEW plugin that groups all the parts residing at each level of the design hierarchy. This makes it easier to see which parts are related so you can work on the layout for that section. You can read more about it here.
Note that if your entire design is placed on a single schematic page, this plugin does you absolutely no good.
A candidate for being part of V6? Placing components efficiently is the hard part of pcb layout
Isn’t something similar already in nightly? I seem to remember that using “update from schematic” places footprints already grouped by sheet.
In the latest nightlies it’s possible to open the context menu on a component and select everything on the same hierarchical sheet. Then it’s easier to move them apart and arrange them. They can of course be moved together also after arranging.
Better initial placement would always be welcome. But this plugin doesn’t actually place them intelligently, does it? Like minimizing ratsnest length/crossings? Intelligent autoplacing would be better than autorouting, IMO.
You’re right: placement is the hard part of PCB layout. This isn’t trying to do that because it would take a massive amount of effort. It just tries to group the components hierarchically so you know which ones are important to each other.
There is a context menu item that will select all components that are on the same hierarchical level as the selected component. That only got me half the way there because it does nothing about showing which groups of components are together on the next level of hierarchy (i.e., it only deals with the leaf levels).
Right, it doesn’t try to minimize ratsnets crossings or do anything like that. That would be a waste of effort any way, because intelligent placement requires so much more than that. This plugin just identifies groups of components to work on at various levels of the hierarchy.
Yeah, “intelligent” so that it wouldn’t require much manual tweaking would be extremely difficult and would at least require putting functional information in the schematics, like “this is a bypass capacitor and must be placed as close as possible to its main component” etc. But I think that after the initial placement the board would be easier to “read” if the ratsnest was as simple as possible. Therefore, if the algorithm would be simple enough, it would be worth it.
I haven’t used multilevel hierarchies myself but this idea of grouping at “various levels of the hierarchy” sounds good. Maybe worth integrating to main KiCad.
It would be, but it is a hard problem. I remember 25 years ago fitting Xilinx fpgas with a genetic algorithm to minimise the use of routing resources. A pcb equivalent would have to calculate each net length (diagonal would do) and apply weightings for more critical nets like clocks.
Is KiCad’s Automatically Place Footprints different than this? (I’ve never used it, so I don’t know. I’m just curious.)
That doesn’t do any placement optimisation. It just places the components side by side, not on top of each other as V4 did.
Placing parts of random sizes and with choices of orientation and board side gives far more variables than the Xilinx fpga software had, so I would expect each placement attempt and annealing step to take minutes rather than seconds. If it was easy, it would already be done.
I haven’t used it myself, so I could be wrong, but according to the documentation:
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