I imported a board outline into my PCB design (KiCad v7.0.8) , placed on the F.Silkscreen layer:
I can verify that the outline is on the F.Silkscreen layer by disabling it in the Appearance list. It vanishes along with the designators:
But when I render it in the 3D viewer, the designators are visible, but the board outline isn’t:
Is this operator error, a known bug or something else?
Your board outline should be on the ‘edge cuts’ layer.
Copy it to there and it should work.
Sorry that I wasn’t clear in the question. I’m making a carrier board for a daughter card. The imported “board outline” is for the daughter card that’s getting mounted on the carrier board. I want to show the outline of the daughter card on the carrier board.
The daughter card’s outline appears as expected on the F.Silkscreen layer in PCB Editor, but not when rendered in the 3D Viewer.
operator error
most probably (there is no silkscreen related bug open on gitlab).
- linewidth of your daughterboard-silkscreen? (if the line is too thin it is there but barely visible)
- Preferences–>3D-viewer–>general silkscreen enabled?
1 Like
Bingo. Linewidth was ridiculously thin. (It’s nice that you can set the linewidth of all the elements of a group, thank you KiCad team…)
1 Like
I just had a look at: PCB Editor / File / Board Setup / Design Rules / Constraints and it has settings for Minimum text height and Minimum text thickness, but it does not have a minimum thickness for graphic items on the Silkscreen.
Maybe this is worth a feature request on Gitlab.
Have you ran DRC on this PCB? Does it complain in any way about those lines?
I did a short test myself by placing a line on F.Silkscreen and setting it to a width of 0.01mm, and DRC does not complain about it.
1 Like
This topic was automatically closed 90 days after the last reply. New replies are no longer allowed.