Impedance matching: Routing differential pairs to BGA

Hi,
How are you dealing with DRC errors routing tracks from/to a BGA footprint which clearly violate the rules set in the “Net Classes” dialogue?

I found this thread post from 2017, but first I don’t understand how @aaron changed the netclass rules: HowTo BGA breakout (diff net class setting for diff parts of track)?

Is there a proper way with custom design rules maybe?

Regards,
Hannes

Custom design rules to provide additional breakout alleviation is probably the best way to manage this.
This is what I have for a fine-pitch leaded ADC while also needed 3W clearance

(version 1)

(rule “3W between digital and others”
(constraint clearance(min 0.45mm))
(condition “(A.NetClass == ‘digital’) && (B.NetClass == ‘digital’)”)
)

(rule “ADC Breakout”
(constraint clearance(min 0.15mm))
(constraint track_width (min 0.125mm) (opt 0.125mm))
(condition “A.intersectsArea(‘ADC_breakout’)”)
)

This can be adapted for a BGA

The alternative is the rule exception area but that is a bit more brutal.