I have done this routing using differential pair router. But at pins where it is going to connect the spacing got increase, do it affect the performance ?
should I agreed this on or it required some changes ?
I have done a number of designs in Kicad with controlled impedance differential pairs up to 5Gbps. My workflow looks like this:
Define the controlled differential impedance based on the standard being used (i.e. 90 Ohm USB, 100 Ohm LVDS, etc.)
Use the Kicad calculator (and double check with an online calculator) to find differential trace width and spacing
Load trace width and spacing into Kicad design rules
Make sure all controlled impedance Nets have descriptive Net Names (i.e. USB0+, USB0-, etc)
Create controlled impedance table in README or other document to communicate to board manufacturer which Net Names have what controlled impedance
Reading your manufacturer’s reply, it looks like you did the above. Communicating the required impedances to the manufacturer is important. Just because you have calculated what the trace parameters should be, the manufacturer may have to tweak the width and gap slightly for their process and dielectric to guarantee the correct required impedance. Good board houses will place a test strip on the panel and verify empirically that impedance values are in specification.
Back to your question, I have never had a manufacturer question the trace impedance at a terminating connector or IC pads.
Two questions I would have:
Are the trace runs themselves are the correct impedance, with the only mismatch at the connector?
What speed is this interface running at?
If you are in the GHz range, you may have issues. I would also double check any vendor’s reference design for the type of interface you are using and double check how they routed it. My gut (but don’t trust it! Verify!) says if the trace impedance is correct, you are probably ok.