I have just submitted my first PCB for manufacture which has a variety of impedance controlled tracks - USB2, USB3.2, GigEth, PCIe, HDMI.
I set multiple net classes up for the impedance controlled tracks (DP width and DP Gap).
I’ve just received communication from the PCB manufacturer that some of the DP tracks have different track gaps along the lengths.
Should these different gaps not have been identified in the DRC that KiCad undertakes?
Otherwise, how does everybody else manage their routing to ensure gaps are correct and consistent along a pair?
I should finish by saying laying out such a complex board was a first for me and a steep learning curve. I normally sub this sort of work out but i thought this time i would try myself. I thought that by setting the DP width and DP gap that any deviance from this, for whatever reason would be flagged. I’m not even sure how this has happened as i routed using “route differential pair”.