Impedance Controlled Board

Hey guys, is there a way to indicate in the board/layout which tracks should have the impedance controlled?

How do you use to do that?

Is there any way to have this information in the Gerber or in some generated file?

Create a net class for those nets

Yeah, this is to design them. But how do you do to communicate this to the design house PCB manufacturer?

If that “design house” is any good, then they probably know better then you which tracks need controlled impedance and take appropriate actions, and this implies you won’t have t tell them anything.

That is, I assume with “design house” you mean a company that does the PCB layout (probably form a schematic you send to them).

Oh damn, I fixed the above. I meant PCB manufacturer.

Do you send the schematics to them? You should send only the Gerbers dude. They should have only a simplified view of your design, otherwise, they can copy or do anything with your design.

Now this is silly. I gave an answer to a completely different question, then you change the question and blame me for the answer I gave for the first question?

The simplest way for a controlled impedance is to just calculate some track width, (and gap for differential pairs), send the geometry to any PCB manufacturer and hope for the best. Using
zigzag routing is one simple way you can improve impedance uniformity without adding any extra cost for the PCB itself.

Next step up is to choose a bit less cheap pool with closer manufacturing tolerances, and a higher quality base material for the PCB.

Next step up is to start communicating with your PCB manufacturer. See for example

The most extreme case I’ve read about was for the front end of some multi GHz radar, and after quite a lot of debugging they found out they could only control their impedances close enough by milling the PCB tracks, so the sides of the tracks were straight. Etching the PCB left the sides of the tracks somewhat irregular and this apparently caused internal reflections and distorted the signal.

1 Like

Kicad 6 onwards includes the ability to add stackup and board information to the layout (and thus the gerbers)

Place → Add Board Characteristics, Add Board Stackup

NOTE: below is a kicad5 design loaded into kicad6 so the info won’t really be consistent (or correct).

This information can be set in Board setup → Physical stackup screen (again this is a kicad5 design so its not correct) - I sent this information to my fab house in the form of a powerpoint to include stackup, finish etc…

Thanks, @paulvdh. I previously tought it was necessary to indicate tracks that should have the impedance controlled so the PCB manufacturer would take a look or have some ways to propper keep the impedance there.

Thanks, @Naib. Sure, this is what I am already doing. So a better question would be if this is enough info for allowing the PCB manufacturer aware of the important tracks to keep the impedance controlled.

If you’re really interested in impedance controlled pcb’s then stop being lazy and do a bit of research yourself. Lot’s of PCB manufacturers have info from generating test coupons to TDR measurements.

And as I already tried to make clear in my first post, there is no single answer. It goes from making some estimates yourself, to ordering PCB’s that have guaranteed impedances including test reports of actual measurements for each PCB.

Apparently it’s also common to just specify the impedance you want, and then let the PCB manufacturer modify track width and clearances to get close to the impedance you specified. Different levels of control, and undoubtedly for different price points and a gazillion different PCB manufacturers.

If you are doing a custom quote, you can add fabrication notes as a separate document which include special requests like controlled impedance checking. Generally it costs extra (though maybe not much more if you’re already doing a fancy board) and takes more time.

If you do go this route:

  • Pick your board stackup to enable the impedance(s) you want, often that means adjusting how close the first full ground layer is to the top layer. Often this process is done in collaboration with a fabrication engineer at the fab house.
  • Use the KiCad calculator (or other calculator) to estimate the trace width, associated with the distance to ground, required to get the impedance you want.
  • When routing the board, make sure to make that trace width unique. If it is 17mils thick on the top layer to get 100ohm differential (or whatever), make sure that no other traces also use 17mil thickness.
  • In fab notes, give the expected impedance (100ohm differential), the acceptable tolerance (often +/-10% or 20%), and which traces are involved. It is easiest to say “all traces that are 17mils thick on the top layer should be impedance controlled”
  • Copy that text to some Fab layer within KiCad, often .Fab or User.Drawings so that when you make the documentation, the impedance control info is always included.

Yeah, this is what I do.
I was thinking that maybe Kicad could generate this info too, as it generates the layer stackup and the general PCB info.

For instance an item with “Place Impedance Checks info”
Then, it could add a list of the net classes with their sizes that have a “Impedance controlled” checkbox marked (it would be necessary to add this extra info as a column in the Net classes view)

Maybe this can be added with

I like your idea of a new text box for fabrication drawings!

In theory, this info could be included into Gerber X2 outputs that KiCad already supports. I assume (but don’t Know) that it could be included in the upcoming IPC-2581 output format.

So this sounds like a concrete feature request to me. Either at text box creation, or export, check through all impedance controlled nets and grab details about width per netclass or as drawn. The main addition to the UI is the checkboxes you mentioned, but also presumably a place to set the expected impedance + tolerance, right?

yes and no

Yes it is more than enough information. No because there is no automated way…

With zero automated way to instruct the fabhouse that you are after impedance controlled (thus driving care on the stack and a coupon to test) you are relying on a human checking this. This is why the auto-websites have a checkbox OR you talk to a human to tell them.

Just talk to your fabhouse and understand how they want to be informed and what testing they will perform to validate their build

Yeah, this is what everyone has to do, I feel. But having this written in the Gerber files, like other comments, like big companies use to do, is a good practice, I feel. This can speed up the process, solve some issues regarding communication (I use a lot of Chinese companies and I am not a native English speaker), and also maintain important info close to the board for ourselves in the future.

Another way is to generate a IPC-D-356A netlist file for your design and list impedance-controlled net names in the fabrication notes (as shown in the IPC-D-356A netlist file). And provide both to the manufacturer

Interesting, I also found that Kicad can export this format.

Inside of this file, there is a list of things (maybe they are wires/traces) and also the related component, another negative number, and a big string on the end, similar to this one.

MD0079PA00X+018070Y+010808X0157Y0000R000S3

As far as I could understand, visually, by looking at the contents of the generated file, it looks like it just gives names to places. And those places, I believe, are related to the traces and lines on Gerber files.

I could not find where is the information regarding the Net Class or the impedance.

Do you have any clue how this file is used or how it works to give the idea of which tracks have to have the impedance controlled?

“The IPC-D-356 format was designed to define a standard netlist format by which bare
board test information can be represented” (link, link)

Netnames from KiCad will be either used in the IPC-D-356A netlist as is or might have aliases if they are longer than the IPC-D-356A format allows.

Then you just list impedance-controlled netnames in your manufacturing notes/drawing.

IPC-D-356A format itself doesn’t have a way to define a net as being impedance controlled.

Also, I believe Gerber X2 supports netlist data as well.

Gerber X2 does support netlist data, at least equivalent to IPC-D-356A, and KiCad outputs this. However, X2 has no dedicated support for impedance control.
Of course, if we feel this is important, we can send a concrete proposal to the developer of the Gerber format (Ucamco). They might even listen to this.

This information can also be output as a Gerber job file, which is supported by KiCad. Machine readable, standardized. It is in JSON, so it is more or less human readable too. Furthermore, there is a free editor for job files, to make it really human readable and editable.