I wish some one is willing to teach and review my routing of DDR

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Hello, I’m still working on my SoC project

Finally I got to do length matching of DDR traces.

And now to my understanding, the track length in net inspector is not expected to be accurate. And I need to rely on the length that calculated in length matching tool instead.

Now I have routed Data 0 bus as a practice. ( I remember I need to meet the requirement to CLK first ? )

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Would anyone review my work, and check whether what I have done is correct.

Thanks!

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