How to prevent kicad from removing net which is not connected?

Hi.

I want to create a daughter board with DAC and ADC. Board has a 10x pinout on both sides left and right. Right one has GNDA and left one has GNDD. I do not have any component on board itself which is connected directly to GNDD. Schematic is fine, but pcbnew removes net GNDD which has no other components connected. GNDD and GNDA are connected on motherboard, so I do not need to create any connection on my daugher board.

How to place sepadare digital ground ?
My project on github.

These two things seem contradictory to me. After the first sentence my advice would be to place a no connect on GNDD.

After the second sentence I’m not so sure. :wink:

I use two ICs. MCP4922 (DAC) and MCP3204 (ADC). Both 12 bit with external voltage reference. Recommended connection to ground in datasheet (page 24) is to connect both DGND and AGND pins from IC to analog ground plane. Now that is confusing for me. DGND and AGND are internally connected with 5-10 ohm resistor.

This forum is mainly about the Kicad software. Someone may wander by and offer some reasons for the chip layout but places like https://www.eevblog.com/forum/index.php are a good place to get into that kind of thing if you want more understanding and detail. Just follow the data sheet in this instance. :wink:

The MCP3204/3208 devices provide both digital and
analog ground connections to provide another means
of noise reduction. As shown in Figure 6-5, the analog
and digital circuitry is separated internal to the device.
This reduces noise from the digital portion of the device
being coupled into the analog portion of the device. The
two grounds are connected internally through the
substrate, which has a resistance of 5 -10Ω.
If no ground plane is utilized, then both grounds must
be connected to VSS on the board. If a ground plane is
available, both digital and analog ground pins should
be connected to the analog ground plane. If both an
analog and a digital ground plane are available, both
the digital and the analog ground pins should be
connected to the analog ground plane. Following these
steps will reduce the amount of digital noise from the
rest of the board being coupled into the A/D converter.

Ok. Will ask on eevblog.

@luqasz, I git-cloned your project and took a look at your schematic and layout (not just a cursory look, but not very detailed, either). As far as KiCAD is concerned, if nothing else is connected to ‘GNDD’, that net does not exist. Most application notes assume that the DAC or ADC will be used only by itself and recommend that analog and digital ground be brought together close to the ADC or DAC and kept separate everywhere else. However, in a system with several ADCs and/or DACs sharing common analog and digital power supplies, a better strategy may be to bring those two grounds together at the power supplies only (hence use separate connections for them and traces/patches on each PCB) and use heavy bypassing at each device since, according to @hermit’s posting above, those two grounds are brought together through a small resistance at each device substrate (so, if you place heavy bypassing on each side of that resistance to the respective ground, you can isolate the coupling of return currents). Beware that very large capacitances may resonate with even small inductance of traces, so you may need to consider ferrite beads and bypass capacitors with higher internal resistance to de-Q such potential parasitic resonances.

That said, I wonder whether your digital signals (chip selects and SPI) need to be referenced to ‘GNDD’ only (which is not possible for the DAC). A good strategy to consider may be to bring ‘GNDA’ and ‘GNDD’ near each other and connect them via a 0Ω resistor close to the ADC. That way, you can easily experiment to see which way gives you the quietest operation and KiCAD won’t complain about a single-node net or nets shorted together. Because the ADC does not have separate digital ground pin, you may want to lay it out so that its SPI pins are close to where ‘GNDD’ and ‘GNDA’ approach each other via the 0Ω resistor.

I see that the SPI traces to U4 do not have any ground associated with them. That is not a good idea (they should probably be over ‘GNDD’; also see above about the ADC). Second, the symbol for U4 (the ADC) does not seem to declare pin 5 anywhere. I am not sure what KiCAD will do in such a case.

Both planes GNDD and GNDA are connected on motherboard. Well If I connect both GNDD and GNDA I will create a ground loop. Am I right ?

Something to keep in mind when one works with isolated gnd areas:
Do not cross over a gab between such areas with traces as such a construction creates a slot antenna. (Even placing a component over the gab could result in this problem if that component.) This means working with separated ground areas is not automatically better than having a single uninterrupted ground plane. (Especially as separated ground areas require additional care.)

Thx. I will use keep out areas.

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