Hi, on a layout I’ve made a mistake to have a via inside a SMD pad.
I’m surprised that this mistake has not triggered any DRC error.
is there a way to activa a DRC checking for that ?
The via and the pad share the same net, so it’s not a DRC error.
In 6.99/7.0 you can use the new mechanical_hole_clearance
constraint to make this a violation.
In fact, the example in the syntax help is for exactly this situation:
# Prevent solder wicking from SMD pads
(rule holes_in_pads
(constraint mechanical_hole_clearance (min 0.2mm))
(condition "B.Pad_Type == 'SMD'"))
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