I am trying to create a footprint for AS7341 related to this merge request. The package has a chamferred pin 1
Is there any way to achieve this with the lga footprint generator? If not, is there an easy way to achieve it with some other footprint generator?
Do it in parts?
Use the footprint generator to make an 8-pad footprint, or just draw an array of 8 pads, and then modify your pad nr 1 to the shape you want.
If you can’t get your result easily in one go, then take a few extra steps. No need to over think it.
But do you really want to follow this exact footprint?
It looks like an old design. Quite a lot of years ago someone figured out that pads with rounded corners have better solder paste release, because there are no corners for the solder paste to get stuck in. That is why the KLC and KiCad also switched to pads with rounded corners when V4 -> V5 happened.
I wasn’t aware that I can set the pad to chamfered with other corners rounded in the GUI. Thank you for bringing it to my attention. Here is the result
How do I make 3D model from either the script or the GUI?
Euhm…
Drawing pads clockwise is unusal.
Upon further inspection:
You posted two pictures from the datasheet, one is mirrored.
I think you made your footprint from the (mirrored) under side view of the actual part.
3D models are not made with KiCad. Use any program that can make them and export in .wrl or .step format.
Another small thing:
I’d also add a chamfered corner on F.SilkS or a dot as pin 1 mark. Your pads are not visible after mounting the IC.
Euhm…
Drawing pads clockwise is unusal.
Here is an excerpt from the description in “IPC Footprint Generator for No Lead Packages”
The script generates footprints in zero orientation version A (pin 1 at top left corner). Pads are generated using rounded rectangle pads as suggested in preliminary releases of IPC-7351C.
Pin 1 is in the top left because it is created like this from the footprint generator, which assigns the pad numbering as well. So blame the machine not me.
You posted two pictures from the datasheet, one is mirrored.
I think you made your footprint from the (mirrored) under side view of the actual part.
the first picture is drawing of the package when looking from the bottom (through the PCB). The second one is the recommend PCB layout. Which brings up a question, and I may be stupid for asking it? How do I know where pin 2 of the package is? Is on the same row as pin 1 or on the next one?
I’d also add a chamfered corner on F.SilkS or a dot as pin 1 mark. Your pads are not visible after mounting the IC.
that is literally a good point.
The most usual convention is to count pins on IC packages counter clockwise. But there is no real standard. Sometimes manufacturers use different numbering for the same package. SOT-23 is an infamous example for that. The only way to be sure is to look it up in the datasheet.
The footprint generator can generate mirrored packages because there is at least one manufacturer (i think Bosch) who can not be bothered to follow industry standards.
This is determined by telling the script that there no pins in y direction. from the readme:
Pad count (
num_pins_x,num_pins_y) {int}
num_pins_x=0 is used for generating DFN-like packages.num_pins_y=0 is used to generate DFN-like package footprints but with inverted pin numbering. (Mirrored numbering scheme. Some manufactures use this style in their datasheets. Make sure you are not looking at the bottom view before using this. Not supported for QFN and similar.)
There is a standard (for most IC packages). The standards body responsible is JEDEC. And generally manufacturers follow it with a few exceptions (SOT-23 and TO-92 are notable exceptions and so are the sensor packages of Bosch that are similar to LGA)
I clicked on that link and opened the datasheet.
The pin layout is shown as usual in the datasheet itself:
From:
If you want to make it easier for yourself, then always work with top-view images. Don’t even look at bottom view images. Those should be banned from datasheets.
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