How to create a custom rule from board edge to board edge clearance

I am creating a pcb with a lot of cutouts. These cutouts shouldn’t be less than 5mm away from the board edge, or another cutout. I want to make a custom rule for this.

I tried the following 4 rules:

(rule "edge to edge 1"
	(constraint clearance(min 5mm))
	(condition "AB.existsOnLayer('Edge.Cuts')")
)

(rule "edge to edge 2"
	(constraint clearance(min 5mm))
	(condition "A.Layer == 'Edge.Cuts' && B.Layer == 'Edge.Cuts'")
)

(rule "edge to edge 3"
	(constraint edge_clearance(min 5mm))
	(condition "A.Layer == 'Edge.Cuts'")
)

(rule "edge to edge 4"
	(constraint edge_clearance(min 5mm))
	(condition "B.Layer == 'Edge.Cuts'")
)

Edge to edge 1 and 2 seem to do nothing. And edge to edge 3 and 4 seems to be acting as a rule between anything copper, and the board edge. Which also isn’t what I want

Is there any way of specifying a working design rule for this?

I don’t think so.

If you can accept a creative workaround for checking if your clearance is violated: draw a zone on some unused graphic layer (e.g. User.1). Make it bigger than the board. When you fill zones, the zone is filled up to the board edges (and also to inner slot edges). In the zone properties set Minimum width to your clearance. Now, when the zone is filled, the gaps between edges are not filled if they are too close together. Change the view Contrast Mode to “Hide inactive layers” and you will easily see if the filled zone has unwanted gaps.

  • clearance is copper-to-copper
  • edge_clearance is copper-to-edge
  • physical_clearance (new in 6.99) is whatever-to-whatever

So if your cutouts are all simple shapes and you’re using 6.99, you could use a physical_clearance rule.

However, if your cutouts are compound shapes (for instance a slot defined by two 180-degree arcs and two lines), then DRC is probably going to throw up errors between the arcs and lines.

Another way to skin the cat would be to implement the cutouts as footprints. Draw your cutout shape on Edge_Cuts, duplicate it and move the duplicate to F_Courtyard, and then write a courtyard_clearance rule.

Oh wait, there is a way to deal with the compound shapes in 6.99: draw it as two arcs and two lines, select all 4, and do a Convert to Polygon.

Hi Jeff, thanks for this hints what is possible in 6.99. Are these features surely part of the coming release 7 in 2023? I’m excited about this release.
I stumbled upon this topic while searching an implementation for a custom DRC rule for the minimum milling tool width for the board cutout. Neither in 6.0 nor in 6.99 rules for this are possible, right?
The rule should respect min arc diameters but only inner not outer shapes. Slot widths aren’t really checkable using the physical_clearance rule.

This needs a bit more processing. Perhaps this should be part of the normal DRC rules? It’s about the general manufacturability.
What do you think? Should I file a feature request if there is none?

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You are talking about a DFM rule. Right now, KiCad isn’t aiming to handle DFM rules specifically (other than those which can be accomplished through custom rules) but it might be a direction we go in the future. I don’t think anyone has filed a feature request for this particular DFM (milling toolpath viability)

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Hi Jon,
isn’t the check for a closed board edge outline the first DFM check? :wink:

Perhaps a more flexible way is to give more possibilities to the custom rule parser that achieving some DFM checks would be possible (and to mention some examples in the integrated help page).
I can imagine there are some reusable functions to figure out if a closed outline is an inner or outer pcb edge… But I understand this isn’t the simplest thing to calculate.

Should I file a feature request for this?

The line is blurry, but what I mean by DFM here are checks that require some more knowledge about how the manufacturing will happen (for example, what diameter of milling cutter will be used).

We don’t have need for this right now, so it doesn’t exist. You’re welcome to request it.