How to connect busses across heirarchy levels (KiCAD 5.1.10)

I’ve run into a problem creating a complex schematic with several levels of heirarchy. Essentially the problem is that I have a wide bus in one block and want to split it to narrower busses to route to other blocks.

In my simple example I have a bus SIG[0…7] and I want to route 4 bits to each of two other blocks. As far as I can tell there is no way to do this… SIG[0…3] connect to the first read4 block but SIG[4…7] don’t connect anywhere.

If I run DRC I get ‘pin not connected’ for SIG[4…7]
Also the netlist doesn’t include those connections.

Interestingly, it works fine in the 5.99 nightly. I’m reluctant to switch my project over since doing real work with the nightly seems risky. I’d prefer to find a work-around for the stable release.



You spoiled yourself by using the nightly.

Hover the mouse over the sheet and right click.
Select : “Import Sheet Pins”

Note: I don’t think the V5.99 syntax works with V5.1.x; so I think you have only 2 actual net labels on your buss.

Note_2: At one point in time the sheet naming that you seem to be using caused problems in one of my designs. It may be fixed now as of a earlier/the current stable version.

Still no progress. I did import the pins, that’s how the pins got there.

What I want is for SIG[0…3] to go to the first block and
SIG[4…7] to go to the second block.

That is what happens in 5.99.

If I can’t sort this in KiCAD 5.1 I will probably abandon this and re-start in Altium (sigh, once again).

Are you certain? Try importing the pins a second time on each page.

Fairly certain you did not actually try the advice given, because there can be more than one result.

Deleted the pins on each page and re-imported them.

No change.

Still, the DRC reports no connection for SIG[4…7] signals,
and those signals are single-pin nets in the netlist.

Simple test design at:

A workaround that should work in 5.1.x is to fan-out your signals before entering the read4 sub-sheets. You’ll need to have 4 input pins on your read4 schematic. Not very elegant, but should pass the correct signals to the two sub-sheets.

That would work for the toy example.

My real design has 576 signals, which are variously grouped by 32, 96 and 192 for different processing elements. Unfortunately this would result in a rather hard-to-read schematic.

Yeah, 5.x really isn’t up to the task for your real design, unfortunately. This will be one of the features that is improved with 6.x as you have discovered with 5.99.

It sucks, but there it is.

This essentially means that you only imported them 1 time each.

After you import a pin the first time, repeat the task and do it a second time (without deleting).

ON EDIT: I recommend you actually repeat the task until you get a pop-up message…

First time, the pin appears as expected.
Second time, I get the pop-up and nothing happens.

No change.

I fear SembazuruCDE is right… KiCAD isn’t really up to this sort of project yet.

Both of your sheets use the same filename “read4.sch”. This means that both sheets must have the exact same content. When you change either sheet, the change is reflected in the other sheets of the same filename.

It seems to me that it would work if you renamed your filenames, and sheets to reflect them. Change the filename of sheet “sheet611C4A49” to “read_4_7” and then change the labels IN[0], to IN[3] to IN[4], IN[7]. Delete any existing pins on the sheet and then import the pins on that sheet.

ON EDIT: Both sheets must have the same content, but the Annotation can/should be different.

Thanks for the suggestion. I could do that. However, the final design has 9 sheets but a total of 56 instances of them. If I really had to do it this way I’d write some code to automatically generate all the variations of the sheets.

I think this sort of project is best done after KiCAD 6 settles.

Meanwhile, thanks for the various suggestions, but I really need to move ahead and I think unfortunately Altium is the way. At least I can translate the individual sheets using their translator, so my work drawing the shem isn’t completely wasted.

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