How to be certain that traces were removed?

My project has undergone significant trace changes. I have run the cleanup function to remove the traces that no longer have net connections.

I have run the DRC. It does not show any problems.

I have used the cleanup function a lot. It often does not catch everything. I think it is just misses trace fragments on pads. Because it misses those, it is hard to have confidence in that particular function.

So, how can I be sure something is not lingering? This is a big, important project and it is not cheap to have the boards made. Is there another test function that I can run?

Thank you for your help and support.

As I see it, the cleanup functions are not to be used as a tool to give a completely clean PCB, but as a helper to reduce the amount of manual effort. And over time these functions get better.

Short track segments missed on pads are mostly harmless. They are not even visually present on made PCB’s, and their biggest effect is an increase of file size.

KiCad V4 used to create a lot of very small track segments on T connections of tracks. This has been greatly reduced in KiCad V5.

I have not made very many PCB’s, but in my experience the final DRC check is pretty good, and probably can be relied on. (If the netlist and Net classes are correct of course. It still follows the GiGo principle).

Still I also do visual checks, which work best with showing the tracks in outline view. Looking at the board from different view points also helps with visual inspection. For example Hide all layers in the Layer Manager, and then look at the copper layers one at a time and check for loose ends. When the clutter of all the other layers is hidden, then errors are much easier to spot.

For more automated tests, a simple scripts which highlights, or at least collects the coordinates of very short segments should be easy to write, either in KiCad itself or as a standalone script which analyses the pcb file on disk. It may be a good idea to look around a bit. There are quite a lot of side projects around KiCad, and some scripts for checking such things may already exist, or maybe you can modify an existing script which was written for another purpose. But again, these short segments are not really important for the PCB.

On the “high end” part there are external commercial programs for checking Gerber files for errors. I have no experience with these though.

Thanks, Paul.

I do the visual inspection that you suggest, as part of my regular workflow.

I do not code. If I found a script, I would not know what to do with it. But, learning the process might be doable, over the long-term.

My biggest concern is not neatness. I just want to be confident that an old trace isn’t making an errant connection, on the new board.

Thanks, again.

On the right side tools, disable the display of silk, mask, fab until there is only top and bottom copper. This may show some debris.

Note there is another tab for additional features where you can disable viewing pads. Turn off pads and you may see more odds and ends of traces.

You can also look at the 3D view and disable items to view bits you want to see.

Thanks, iabarry. I do this as part of my regular work-flow. However, this would not catch a full trace that was not supposed to be there… A full leftover trace…

Maybe this will help clarify… I made changes to the schematic. I created the new netlist. I imported the new netlist onto the board. I ran the cleanup function, to remove any traces that are not part of the new netlist. However, because I know that the cleanup function does not catch everything, I do not have confidence that a complete, errant trace might not remain.

If there was such an errant trace on the board, I would not catch it visually, when I do the visual trace review. So, I am looking for a way to be confident that there is not a lingering trace. Or, can I fully trust that the clean up function only misses those parts of a trace that are left on a pad? If so, why?

Thank you for your input.

When you read the new netlist it should remove unwanted traces. The CleanUp is a separate function.
I revise designs endlessly and don’t recall an instance of an extra trace. If you run DRC that should also identify errors. So there are 3 tests.

Btw you can manually move/drag a trace to create a short, then see if the tools will identify it.

Ahhh… I like your test idea. Very good, sir. I will give that a go and report back.

As said before, I see the “cleanup Tracks and Via’s” just as a tool to reduce manual labor.

DRC is the real thing and I have not seen making it mistakes yet.

If you keep your board in a version control repository (Git, SVN or Fossil), you can use this tool which will provide visual comparisons of layout of any two versions.

For what it’s worth, KiCommand can do this quite easily. The following command will select all track segments less than 1mm in length, and print the number of segments found:

  • tracks copy length 1 mm < filter copy select len print

Breakdown of how the command is constructed:

  • tracks - get all tracks
  • copy - make a copy of the list of tracks
  • length - measure the track segment lengths
  • 1 mm - get the value of 1 mm (in native units)
  • < - compare each track length with 1 mm
  • filter - remove those tracks from the list that are 1mm or greater

Now that the resulting tracks are available, now we select and count them (using the length of the array of tracks):

  • copy - make a copy of the list of tracks
  • select - select these tracks
  • len - count the number of tracks
  • print - print the number value

You can also print the start/end point coordinates of those tracks if you want. Let me know if you want help constructing the command for that.

More information about KiCommand is available starting at the github KiCommand Readme.md file

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