How to Apply Net Class Clearance Rule to NC Pad?

I think there is a change from 5.0

in 5.1 and 6.0 (master) when a pin is given a net name but is not connected,

image

this does not translate to PCB pad

image

When routing BGA breakout, I try to apply a “tighter” rule to the BGA connected nets by using a BGA net class, however the NC pads prevent breakout routing

I can explicitly connect the net by adding a trace and via

However, I would like to avoid doing this.

Besides setting a smaller default clearance, is there a way to assign a net class to these unconnected, but named, nets?

Sample Project unconnected-net-issue.zip (7.6 KB)

There is a switch in the schematic to board updater (also I think in netlist import but I didn’t double check) that will ignore single pin nets.


Check to see if that is off?

1 Like

This topic was automatically closed 90 days after the last reply. New replies are no longer allowed.