How to accomodate two grounds in one design

What is the best way to implement two different ground connections? The chips I am using have two different ground symbols called PGND and SGND. I have a 4 layer board, with the third layer as a full ground (PGND) plane and then a filled section of the second layer under the chips that need SGND for SGND. So far so good. But I cannot figure out how to connect the two grounds. I have them connected in the schematic, and I thought I could just connect two vias together, one to SGND and one to PGND, but the trace won’t connect.


You need to use a ‘Net Tie’ in the schematic. The symbols are available the ‘Device’ library and there are varieties for 2, 3 and 4 way connections and appropriate Footprints to suit.

@John_Pateman Thanks! Very cool. However, none of my Net Ties have footprints.

I am using KiCad 7.01.11 on Ubuntu. Where can I find them? Or, how can I make one?

Never mind. I found them and associated a foot print with my Net Tie symbol. Worked like a charm.

Do you just use one Net Tie or several on a board? I would think several would create ground loops. Am I right?

To connect different grounds (eg: analog-to-digital, power-supply-to-esd-ring…), I tie at only one place, closest to the power supply common. Otherwise, yes, loops.

I found that smd ties only applied to top/bot layers. To get my inner planes to tie, I made one with three through-hole pads (two round pads of different numbers, and a center rectangular pad that overlaps the other two numbered as either pad number). Could make a smaller one with two overlapping pads. Of course this leads to drc errors to ignore – can write a rule for it though.


From the discussion I see and what is presented by @pmi, I think it may be wise for the OP to identify what are


Proper grounding is an issue of never ending discussion among EEs. Grounding connections may be very critical (or not) with many variations in between. By the way the original question was asked, I wonder whether due diligence is being applied…

I am coming at this from more of an EE angle than a KiCad angle.

I have used a net tie for grounding of an IC in a recent home project, but really its presence in the schematic and netlist is a “gimmick” to include the requirement into the schematic and help insure that the need for ground segregation is considered. It ought to be possible to do proper grounding without the net tie, but doing so means that you need to be careful so as to not ignore the grounding requirements.

For the record, I am using the MAX17320 and the MAX17633. My preferences is BBQ flavored, but these will have to do.

Quick look at the MAX17320 datasheet (I might have missed something): I did not see any clear information regarding proper pcb layout.

For the chips, try a sour cream and onion DIP, even though both IC packages are SMT.

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