How segment & footprint move?

Layout
1

Hi,

I have a few simple questions. :wink:

a)
Why is it not possible to select several track segments and move them together? Without tearing up all the traces. Why do you have to move them all individually?

a
a506×789 126 KB

b)
Why can’t you move the right-hand card footprint together with all the traces by selecting the ‘D’ key? This should work with version 8. The footprint always jumps back to the old position after moving. What do you have to do?

b
b467×968 76.4 KB

PlugInCard.zip (641.4 KB)

1 Like
2

For Q2, you have to check “Allow DRC violations”

image
image1058×538 85.8 KB

3

Hi,

no, I haven’t. Must it be activated?

c

4

KiCad has always gotten easily confused when there are DRC errors on the PCB.
You can temporarily overrule DRC if you hold down the [Ctrl] key at the end of a drag when you release the mouse button.

For your first problem (which youshould fix first, because it causes the DRC violations of shorted tracks and thus nets)

  1. First change this setting: PCB Editor / Preferences / Preferences / PCB Editor/ Editing Options / Magnetic Points / Snap to tracks and set it to Always.
  2. Select some of the slanted tracks by dragging a box from left to right. Then hold down the [Shift] key, and drag another small box. This will add to the existing selection. If you selected too much, use [Ctrl + Shift] and click on something or drag a box and it will be subtracted from the selection.
  3. Right click, and from the context (popup) menu, select: Positioning tools / Move with reference.
  4. Select a convenient point to move your selection, for example the endpoint of the third track segment from the top. Note the circle around the cursor cross. It indicates KiCad found a snap point.
    image
  5. Now move the block and select the endpoint of the move, which is in this case the endpoint of the third horizontal track from the top:
    image

For dragging the connector. I can confirm that dragging while holding the [Ctrl] key works. But I was curious about the origin of the problem. I discovered I could drag it a bit to the left side without DRC problems and place it there without holding the [Ctrl] key, but never drag it to the right.It looks like KiCad detects DRC violations between the connector pads, and Edge.Cuts, and does not recognize that the the Edge.Cuts lines in this instance are a part of the connector and move with it.

KiCad also does not like the graphical polygons used to expose the fingers of the edge connector. This probably is not a footprint from KiCad’s default libraries. I am not sure what would be best practice here. I looked at a few of KiCad’s card edge connectors in KiCad’s default libraries, and most do not have anything special on the solder mask layers (which is also a bit strange). The SODIMM card edge connectors do have graphic rectangles on the solder mask layers. I think using aperture pads would be a better option, but I am not really sure here.

5

i think a) is just a limitation as drag currently dont work for multiple tracks, but does work for multiple footprints. Maybe this should be reported as a wishlist item, Couldnt find one in quick search

6

I was a bit confused by microcoder’s opening post. He wrote:

While the screenshot below it clearly shows all those slanted tracks have been “moved together”. So I gave a little tutorial on how to put that particular bunch of tracks back. (After the snapping to tracks is set to “Always” the “move with reference” is not even strictly needed.

Also (just curious) Why use such a big HC49 crystal?

7

Hi,

d
d966×553 106 KB

thank you for the explanations. I still can’t get the track segments to track left and right automatically. The tracks are always disconnected.

If you move a footprint, the track connections are retained, they are moved along. This is exactly what I thought must also work with multiple tracks.

Because of the edge card. The footprint is from GitHub.
https://github.com/timonsku/M.2-Card-Footprints
Should I make a new one myself and use the template of a KiCad SO-DIMM?

@ joojala
It may well be that a) it only works with footprints. I don’t know. If this is the case, it would really be desirable to expand the PCB editor. The possibility of displacement must be available for everything.

Because the crystal is replaceable. Sleeves from Mill-Max go in there.

8

it only works with footprints. I don’t know. If this is the case, it would really be desirable

See there are changes being made in the nightly builds that allows this. So clearly somone is working on something like this. Might be worth adding a request in the issues database

9

Move is very simple in KiCad. It just disregards DRC, so you can easily move things all around, but also easily create shorts.

Dragging footprints or tracks is more sophisticated, but not very sophisticated. The main trick is to do things in small steps, When you have DRC violations in multiple locations, then KiCad’s algorithms get confused, and it does not work very well.

While looking at your project, I guess you do not have much experience with PCB design. A project like this is a good beginners project, but it’s also got some more … “advanced” features. I tinkered a bit with your PCB and have some notes.

  1. I extended the GND plane to fill your whole PCB.
  2. More GND is always more betterer. If possible, then even use both internal layers for GND, especially when there are many digital signals around. The reason is that prepreg is much thinner then the core of the PCB. For more background info, the Rick Hartley video about proper ground planes (Youtube 2h19m) is a good watch.
  3. I moved the GND plane to Layer 3 (why did you reverse the numbering order?) Reason is that it’s closer to the IC, and it’s pads.
  4. Moved the uC a bit to the right.
  5. The combination of 1u, 100n, 10n is a bit silly. I know it’s recommended sometimes, but those are special cases, and I’m not even sure if it’s good practice then. I usually stick with the 100nF per power pin pair, and amend it with a bigger (low frequency, may be electrolytic) buffer capacitor, which is mostly to decouple the whole PCB from the power supply cables.
  6. Learn to use net classes.
  7. I took AVDD out of the bus. I don’t like “hiding” power inside a bus. (but it’s mostly arbitrary habit).
  8. Have you considered an on board voltage regulator for 5V → 3V3?
  9. That DTR_OUT global label is not connected (yet). Learn to use ERC & DRC.
  10. You changed the color of the labels on the32kHz crystal. Such things make it (a little bit) harder for others to read your schematic.
  11. Instead of drawing boxes, I prefer whitespace, combined with titles in a bigger and fat font. This also emphasizes circuit sections.
  12. For those titles, standardize on capitalization and font size. It looks neater.
  13. Using a title (and a box! for something like a main crystal is a bit over the top. Sure, the crystal is important, but it’s also extremely common in each uC circuit. Making a not that it’s socketed / interchangable would give more useful info.
  14. First filtering AVDD from 5V, and then taking it to a connector, adds noise pickup again.
  15. For noise… consider using ferrite beads for the power getting onto the PCB too. (This also filters EMC trying to get off the PCB.
  16. For the PCB. You turned the “shove” mode of the interactive router off. Do not do that, it is one of the most powerful features of KiCad. Learn to use the interactive router effectively.
  17. I removed a bit of GND around the main crystal. This is indeed recommended sometimes, but I am not sure how important it is. I also kept the tracks to the crystal way from other stuff. (That is also a recommendation).
  18. Do not make groups of via’s. Those cut the (internal) GND plane to pieces, and that is not good. Spread via’s a bit around so the GND fits in between. Using Tools / Remove Unused Pads also helps because you can retain more of the GND plane when pads on unconnected layers are removed.
  19. I changed your net class settings. You had very thin tracks and a narrow clearance too. Do not make the netclass rules too small, This either drives up cost, or limits you which PCB manufacturers can make your PCB while keeping it affordable.
  20. I do not like edge connectors (something personal). They are great for mass production, but a nuisance for hobby level PCB’s because of the gold plating. I prefer simple old fashioned box headers. But it is of course your choice.
  21. Keeping all footprints on the same layer is more convenient for automated assembly, and possibly also for mounting the PCB in some kind of enclosure.
  22. A proper GND plane (at least one) is important. Do not cut tracks through the GND plane for routing for example AVDD.
  23. Its not intuitive if you have different names for the zip archive, and the name posted on this forum.
  24. You can safely delete the backup directory and the fp-info-cache file from the project. That reduces the size of the archive from 640kB to 100kB.

I have not finished your PCB, I just did a bit of tinkering with it. Either use it or disregard it.
2024-08-11_M2 PCIe Steckkarte.zip (98.8 KB)

Edit: numbered the list to make it easier to respond.

10

When you connect different value ceramic capacitors you get paralel resonances getting frequencies at which capacitors simply don’t work (instead of having small impedance have high).
Just simulate such connection using real C models (including at least their ESL).
If it happens that one of harmonic of generated disturbance hits such frequency it will be not blocked by these capacitors set.
The better is to use more capacitors but the same value.
You can connect to them one with big capacity provided it has high ESR (like electrolytics have) as the resonance is damped in such case.

11

Hello,

I’ll take the ideas with me. Thank you. However, my layout was and is far from finished.
The current status is

e
e1268×637 166 KB

f
f1249×627 191 KB

I count the layers from bottom to top like the floors in an elevator. Nothing is mixed up.
Just named differently according to the layer structure.

My first concern was how to move traces without disconnecting them. I still don’t know how to do that. I still don’t know what to set in the PCB editor.

The 3 capacity values for VCC are in the AVRxDB manual. Is that really wrong? I’ll change it.

Because of the edge card footprint? Should I create a new one based on the SO-DIMM footprint so that it causes fewer problems?

These are my important questions.

12

KiCad does have limited options here. Algorithms to automate this get complicated really quickly. Your main goal is to place footprints in the right place, and then not move them anymore. But this needs some experience in planning how much space you need for tracks.
Sometimes it’s easier to just delete tracks, move (a block of) footprints with tracks, and then re-connect them again.

No, It’s not wrong on itself. There are valid reasons for doing so. I have heard too many conflicted information about this to know what to believe. It can have problems with oscillations between the parts, and this makes it layout dependent, and also dependent on ESR. But even if you do place the footprints on the PCB, you still have the option whether you solder them or leave them open :slight_smile:

No, the SO-DIMM uses pretty much the same technique for the solder mask. KiCad’s DRC complains about it, but it probably is not a real issue, just DRC not knowing what to do. You can disable some DRC messages here, but do generate a set of Gerber files and have a look at them before you send them to the PCB fab. It’s quite easy and quick to generate some gerber files to see whether specific features in the PCB editor result in something that is proper to send to a PCB fab.

13

Hi,

Thanks.

In the meantime I have understood that you can move track segments without disconnect them. Now I understand that it doesn’t work?

14

I have not looked into your project (I have no KiCad here as I am at Win7). I don’t understand what you are trying to do and what doesn’t work.
I moved in 2017 to KiCad because it had a possibility to route track with pushing all previous to make room for your track and Protel 3 I was using didn’t had it. You can also drag track segment with pushing all other tracks on the way.

15

Well, it does work, but such functions do have their limits. There are also multiple different ways to do so, depending on the situation. One way is to drag a footprint with the d key while tracks are attached, but this does not work well with parts with many connections or rotated parts such as your uC. It also does not work well in cramped area’s. But if there is some room and the parts are simple (such as resistors), then it works quite well.

Another method is with PCB Editor / Route / Interactive Router Settings. But you have to put the interactive router into the Shove mode, and in your project it was set to the Highlight Collisions mode, and then shoving does not work.

image

KiCad development is a bit chaotic, which is common with Open Source projects. There are many useful functions, but they do not all work very well or in each combination. Over the last few years all the “big gaps” have been ironed out, but there are 1000+ open feature requests (and bugs) listed on github, and there is only a limited amount of hours available for all KiCad developers. Lots of functions get improved over time, but some functions also get left behind a bit because the amount of developer hours is such a scarce resource for KiCad. But overall KiCad is still the best EDA suite I have ever worked with, and it is improving rapidly each year.

16

Hello,

sorry. I think we are talking about different things. I’m only talking about moving tracks. I can move single track without disconnecting them. But I want to move more than one track together - without it disconnecting them. If more than one track is selected, it always cuts them up. No matter how the interactive autorouter is set.

That’s why I created a small record. :wink:
Does everyone now understand what my question is?

17

In V8 you can’t drag selected block. May be in V9 you will be able to drag it.
But when you drag one track other can be pushed.

18

No, or maybe yes. It’s the same thing, but you are mixing up different functions. The Shove mode works only when dragging things or while creating new tracks. It does not work when moving items (or a selection of items) I see @00:58 that Shove mode was on, but you did not use it. Try grabbing a single track in the middle of the bundle and then just drag it to the side, or do it with a via.

For the bigger picture, I have completely changed the way I do routing in KiCad. I just start with making connections (The f key for finish while routing is another nice speedup) first, and then later I just shove things aside to make a bundle of them, or shove things apart to make room for an extra track or via.

19

Hi,

I know that. :wink:

It works and I hadn’t understood it the whole time. Thanks. :+1: However, this changes the distances between the tracks. Some of them also change abruptly. It remains to be seen whether this really brings an advantage in the end.

Kicad has a big problem. There are too many possibilities but hardly any of them are thought through to the end. It would be better if there were fewer options that could be better used.

It seems that different people are programming the schematics and layout editor and not talking to each other. A standardized operating concept is needed here. The schematics sometimes offer better options for the same things. Although it has improved with version 8, it would be better to put a stop to features and subject everything to a concept. Otherwise the programmers won’t be able to keep up.

Kicad has grown quickly. Perhaps too quickly. Now is the time to tidy things up. You can also see this in the Footprint Editor. Some footprints are missing the 3D model. The path is there but does not exist or is wrong. These are certainly all clinical issues, but all in all they are always annoying. That’s why things should be tidied up before new things are added. I don’t think anyone has anything against tidying up first.

Thank you for your help. I hope that KiCad will go the right way. I hope it never becomes as opaque and buggy as Altium. I hope so.

20

Please read this FAQ for an explanation.

This explanation is still current for Kicad 8.0.4