I just don’t see the unconnected area.
Does KiCad offer a tool, helping me to find the unconnected area?
Marko
Looks pretty obvious to me.
Unless you have connections on a layer that’s not shown, that vertical fill is actually two disconnected islands.
Looks like you have three unconnected regions (unless they are connected on other layers through the thermal pads).
I see a total of eight, unless there are some connecting vias somewhere (I’m not sure what the white dots are).
I don’t agree.
I count about 23 vertical tracks, and each and everyone of them reduces the effectivity of your GND plane. If you have to go searching through the maze to where the tiny “missing link” may be, then all the electrons also have to go through those convoluted paths, and this is a significant increase of the impedance of the GND plane. Its just a very bad design / practice.
Do some research on what GND planes are, why their impedance is important, and what things to do to make sure you do it right. The two hour and 19 minute video from Rick Hartey is an excellent reference.
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The question is about the unconnected ground fills causing DRC errors, not the impedance of the remainder.
Talk about not seeing the woods for the trees! I was blinded by the obvious big ones.
Put the cursor on a ground pad and type `. That will highlight the ground coffee, er copper. The fills not highlighted are unconnected.
In future you might prefer a different workflow. Disable isolated islands in the options. Then where you see a blank area, add a via to the another ground plane then refill with the b key.
The comment wasn’t aimed at you. That is why I didn’t tag it to your avatar. It was for the benefit of the OP. Yours was just a better image to use.
I sort of figured out that if you could find both the woods and trees with this software, you’d be able to sort out a PCB if you did more than just glance at it. 
The joys of text-based communications. I was meaning that I didn’t see the wood for the trees 
I got distracted by the obvious big areas.
But the interesting point here would be how to show this perhaps an outline of each unconnected region as the DRC marker (see new features which visually show clearance violations for example).
I haven’t tried the new feature mentioned.
Something sort of similar to the “highlight” function?
It would be best if each problem island indication could be turned off independently to allow clarity for modifying the PCB.
Ie. notice one island, turn off the “Highlight”, fix the problem, move on to the next island and so on.
And I wrote the below comment badly:
Meaning: you are able to dive into the program software and create new functions without causing havoc, so I assumed you should be able to find problems with a PCB you designed without too much external help.
This works only for islands having no connection with any GND pad. Island having such connection is not deleted even it has no connection with the main GND zone.
This reminds me of the old problem and my proposed partial solution, (Wrong?) error: Missing connection between items - #39 by eelik.
Sorry for the confusion. Of cause there is a Bottom layer as well.
As far as I can see everything is connected. But DRC says that there is something bot connected:
Top:
Bottom:
I hoped that some tool can point me to the missing connections between the two gound planes.
Marko
Found it:
There was one more via needed for 2 isolated areas on the bottom.
It would be nice, if the DRC would somehow highlite the not connected area.
But it placed a cross in the right corner, that helped a lot!
Marko
So your whole GND net was divided into 2 not connected parts.
Now these two parts are connected with your new via and you are happy with it?
Do you understand that each signal going between element having its GND pin connected with one of those 2 GND parts to element hawing its GND pin connected to second part will get its circle (all currents flow in closed circles) through your new via?
Do you understand that if supply is connected to one of those GND net parts than supply current to all parts having their GND connected to second GND net part will be directed through this new via?
Do you understand that having all these signals and power supply being routed through one common via is asking for trouble?
Your PCB has very badly designed GND.
Since many years I design 2 layer PCBs with whole one layer being GND. This gives me the lowest possible impedance for each return current path.
The example of such designed PCB:
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I’m designing PCBs for over 30 years, so yes to all your “do you understand” questions.
Only KiCad is new to me, so I picked a simple thing to learn on. For me it was important to get the DRC clean (and to understand the messages).
Thanks for your help - it’s a good feeling to know that I’m not alone in the learning phase.
Marko