correction, your example has the same problem if I add a copper fill on the back side:
I guess that’s because the fill can’t reach the center of the pad it won’t connect. Maybe I can manually connect to the edges of each pad. (If you make the pads big enough compared to the hole, it does reach them - you can see that your ovals are connected only on the long side because of the Clearance of Doom).
I think I got it! Setting the fill clearance to zero finally connects properly:
I think this is workable. Thank you everyone!
Where is that fill clearance? Is it in the zone properties, board setup or somewhere else?
It’s in the copper zone properties → settings pane → clearance. Makes sense that would try to stay clear of NPTH in retrospect!
And also, @BlackCoffee, I think you’re not seeing the issue because you are not trying to use Kicad to validate your layout? If you’re not using filled zones it should mark all the grounds in your example as disconnected, and my guess is you don’t care about that (or did I miss something?)
That’s not a problem if one side is a solid ground plane, but on double sided boards you’ll have many small disconnected islands and I need CAD to help me figure out where and how many vias to place.
You are ‘Correct’. I don’t use or care about DRC. I have full flexibility doing layouts (doing it as I stated). All Grounds are connected (and isolated from the Stock Ground-Planes EXCEPT on Via’s). Residual islands are irrelevant - I place Via’s where needed and they don’t get isolated - It’s my Choice when setting-up the Milling process. And, normally, when I use Vias, I don’t actually use Vias - I just make a tiny NPTH hole - just like as shown for the big Hole. Thus, Top and Btm Cu is connected…
Your boards must be pretty simple then, or you are a design genius. I have a relatively simple circuit with ~40 components and I need about 30 vias. No way I can afford to do continuity tests mentally 
It looks that you assume that 2 layer board means no solid ground plane.
That sounds surprising to me as since many years all my designs are 2 layer boards with solid ground plane at bottom.
In my case it is possible thanks to:
In typical PCB I need no 0Rs. The highest number of 0Rs used because of routing I remember is 3. It is at PCB I showed its fragment here:
All vias you see there are GND. You can find there something looking like track ended with via but it is also filled zone. When I posted that I thought you can see 2 0Rs there, but there are 3 of them. Right top of microcontroller (over 3 tracks), right bottom of microcontroller (over 2 tracks), and to VC1 track.
So all my vias are used to connect GND pins to GND and to connect GND islands on top to solid GND at bottom. If I were designing home made PCB without metallization I would probably not used GND zone at top at all as it is only a problem to connect all that islands.
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