Trying to fully specify fab limits for a complicated (and expensive…) board and wondering if there is something I’m missing. It looks like hole to hole clearance is not applied on the same net? I can put two vias right on top of each other and get no DRC error. Inspect->Clearance shows the correct value. This is a mechanical limitation, net shouldn’t matter here. I’m just wondering if I’m not seeing something - I know the DRC system got a lot more complicated in v6 and it wouldn’t be the first time I missed something glaringly obvious in the clearance system.
I placed two via’s on top of each other and got:
Technically it’s not an error. If two holes are drilled at the same location, then it just results an a very small amount of extra time for the CNC drilling. If two holes are drilled too close to each other, then drills can break, and this is a very serious DRC violation.
Weird thing is though, that I do not see this in: PCB Editor / File / Board Setup / Design Rules / Violation Severity
I am not sure whether the setting should be there, (and thus is a bug), or that this setting is somewhere else.
I didn’t mean at the exact same location, sorry. I just meant overlapping. If I stack them perfectly I do get the warning (but only for through vias - microvias do not!) And it’s happy to let them overlap or otherwise violate their clearance 
Ah, well then, why didn’t you say so? 
For me it works as expected:
Something new in KiCad V6 is that all DRC violations can be set to either “Error”, “Warning” or “Ignore” in PCB Editor / File / Board Setup / Design Rules / Violation Severity
While you are in the DRC Control window, yo can also control what is shown to you with the check boxes at the bottom, and you can exclude items by right clicking on them.
How strange. I do have “Drilled holes too close together” set to give an error, but don’t get anything for this. I assumed there was something wrong with my custom rules, but Inspect confirms what it thinks the clearance is.
There are three classes: electrical clearance (ignored for same net), hole-to-hole clearance (for drilling), and mechanical clearance (6.99 only, tested even if same nets).
Hole-to-hole reports insufficient-clearance and co-located under different violations because some people want the latter and some people don’t.
Makes sense. I’m still trying to figure out why I can totally overlap holes on this board and get nothing about it in DRC when I’m pretty sure I’ve turned everything on that I can find. I may try to simmer it down to a simpler testcase if possible but I’m kinda slammed this week
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