I have a schematic that uses hierarchical sheets to improve readibility. I select pin names in the hierarchical sheets that make sense in that local sheet. I also use a local name on the top schematic on the hierarchy, because I want to have a top-level net name that makes sense. Take this dummy schematic below that has two hierarchical blocks. The schematic is fairly legible, and I am happy with the appearance.
However, when I go to layout, the hierarchical pin labels override the local net names from the top-level schematic. This can result in identical looking nets in layout which can be confusing. Below is the same schematic as above, but you can see that the hierarchical pins have completely overridden the original top netlist name.
Is there a way to set the net naming to âflow downâ the hierarchy instead?
Thanks Andy, it makes sense that the nets are not actually the same.
Still, it would be easier to read if the program displayed the top hierarchyâs name for the net, and not the sub-hierarchyâs name which is repeated multiple times.
Same issue here, except Iâm working on a much larger schematic.
I find that this is actually some kind of bug, and have yet to find a workaround.
Observations:
In a row of 24 hierarchical pins, the netlist was being exported correctly until I started using + and - for differential pairs. At this point, the netlist generator decided some nets would use the h-pin names and some would use the net names on the bus.
As stated in the last sentence, not every net attached to a hierarchical pin is inheriting the net name of the h-pin, only a few. Very frustrating since this stands in the way of differential pair routing and I really donât want to go re-name all several-hundred h-pins.
Still, it would be easier to read if the program displayed the top hierarchyâs name for the net, and not the sub-hierarchyâs name which is repeated multiple times.
Agreed. I have found a workaround (âsolutionâ is probably too generous of a term). Adding local labels on the top sheet doesnât help, but if you add a hierarchical label on the top sheet Iâve found that KiCad uses that name for the net. This is, of course, a silly thing to do since your top sheet, by definition, wonât be a component in a hierarchy. Nevertheless it seems to work and is fairly innocuous. (As opposed to using a global label, which also works in terms of forcing KiCad to use that name for the net, but may mess up your circuit).
I have the same issue. Iâve posted a bugreport, please check it out and click âAlso affects projectâ button if you anticipate with it. @mbarlow, I have attached your pictures in the bugreport, I hope itâs okay with you.
Please go ahead. Note that it is for an old version of KiCAD, and I have not tested it since I posted. I agree that it really hinders the utility of multi-page schematics.
