Hierarchical Sheets and Busses (again)

So I did a schematic with hierarchical sheets, where some sheets are used multiple times.
Imagine a clock where I use double-7-segment displays bundled with decoders.
I put the A,B,C,D lines of each decoder to a hierarchical bus label.

This units are used multiple times in my schematic. Now the problem… when i draw a bus from the connector it has always the correct Connection Name (sheetname/signalname.x).
An Signal I unfold from these busses get the same connection Names.


BUT… sometimes it gets a new Signal Name in the top hierarchical layer with indices attached.

And sometimes it even gets a wrong Connection name

Sometimes it gets crazy and does both on one sheet

Here’s the project file
HierachicalBusses_231127_DNK.zip (10.1 KB)

Version Info:
Application: KiCad Schematic Editor x86_64 on x86_64

Version: 7.0.9, release build

Libraries:
wxWidgets 3.2.4
FreeType 2.13.2
HarfBuzz 8.1.1
FontConfig 2.14.2
libcurl/8.4.0-DEV OpenSSL/3.1.4 zlib/1.3 nghttp2/1.56.0

Platform: Freedesktop.org SDK 23.08 (Flatpak runtime), 64 bit, Little endian, wxGTK, KDE (One-Time Launch), x11

Build Info:
Date: Nov 14 2023 06:02:46
wxWidgets: 3.2.4 (wchar_t,wx containers) GTK+ 3.24
Boost: 1.83.0
OCC: 7.7.2
Curl: 8.4.0-DEV
ngspice: 41
Compiler: GCC 13.2.0 with C++ ABI 1018

Build settings:
KICAD_SPICE=ON

When I right click on a bus in your root sheet and select Unfold from Bus I get different names again:

I guess this is expected.
The name of the bus in the sub sheets, can not propagate to the root sheet, because the result would be that different instances of a sheet would get connected to each other. The solution is to give each of the buses in the root sheet a name by attaching a label to each of them.

On top of that, I am not sure whether using a hierarchical label on a bus gives the bus itself a name. The following method seems to work:

  1. Create a list of bus aliases in: Schematic Editor / File / Schematic Setup / Project / Bus Alias Definitions

  1. Use the name name and the list in the hierarchical sheet label:

  1. In the root sheet, import the new hierarchical labels with the “alfabet” list, and also give the bus a new name (also with the “alfabet” list).

After this you can use the highlight function to verify KiCad recognizes the connections.

2 Likes

Hi Paul,

thanks for your suggestions, actually I already had an alias “BCD” with A, B, C, D, but I didn’t put it in the example to make it as easy as possible.
By defining new root sheet labels it works somehow but i wonder how KiCAD is connecting the signals with logically different names.
Ok I keep with .A .B .C .D to be on the save site, but what if i rename the bus to something total different?

Interstingly now the Label that i gave on the root sheet propagates into the sub sheet, which is nice, i think.

You can rename the bus. I also renamed the DIG1 bus on the hierarchical sheet to BUS_AI_Left on the root sheet, and if you highlight the broken out wire, and then go to the sub sheet, you see that DIG1.B is also highlighted. (Highlighting is persistent). The two buses are connected and the signal names are the same.

Yes but what if I rename to Left{H I J K} or left {D C B A}?
I guess then the order is the key… so in second example DIG1.A will connected to left.D!?
Or is using the same alias the key?

Best I know, such things are not recognized at all by KiCad. I think (but am not abolutely sure that bus names only define the names, and it does not connect wires together, unless the names of the bus members match.

Buses used to be only graphical entities with no meaning at all in older KiCad versions. In those older versions it was not possible to route a bus through a hierarchy at all. Back then you had to break out all wires and connect them individually.

Even now buses are mostly graphic eye candy. You can use the “Break Out from Bus” function so you do not have to remember bus names, but even if a wire is not connected to a bus, it is still a member of the bus.

Try this:

  1. Delete the bus entry, but leave the wire and the label.
  2. Edit the wire label to represent another bus member.
  3. Use the highlight function to highlight the wire.

And as you can see, the DIG1.C in the hierarchical sheet is highlighted too:

Running into a similar problem with hierarchical sheets and busses. Basically, the signals don’t seem to track through to the 2nd child sheet. I created a simple example to show the problem I’m seeing. Looking at the net list it doesn’t look to connect the 2 connectors either.

Root:

1st Child:

2nd Child:

Attached is the project. Didn’t seem to have an effect if I changed the names of the hierarchical label.
TestKicad.zip (11.2 KB)

Update: I did some more testing and it seems like the bus can only be unfolded once. I’ve added a few more cases to my test file and found the only way the signal is able to process through all levels is if the hierarchical label is connected directly to the bus exiting the hierarchical block.

Example of the signal not making it through all levels:
Root:

1st Child:

2nd Child:

Example of the signal making it through all levels (notice the change in the 1st Child sheet):
Root:

1st Child with change to where the hierarchical label for BusC is connected:

2nd Child:

Updated project file:
TestKicad.zip (21.5 KB)

Not sure if this is a bug, or expected functionality.

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