Hierarchical Schematic BOM

Perhaps I’m not using hierarchical sheets properly… Please correct me in what I’m doing!

I have a couple sub-circuits that I want to use multiple times throughout my over all design. Let’s call the lowest level circuits leaf_0 and leaf_1. I captured these in their own schematic sheets.

I created a couple of higher level hierarchy schematics. Let’s say mid_0 has 4 instances of leaf_0 and mid_1 has 3 instances of leaf_0 and 1 instance of leaf_1. I created the instance by using “Add sheet” and giving each instance a unique name, but pointing to the file for either leaf_0 or leaf_1 (as appropriate).

Then I created another level of hierarchy that instantiates the “mid” components. Let’s call this top_0. Again I instantiated the mid components by doing the “Add sheet” and referencing the proper files.

So top_0 has mid_0 and mid_1. The two mid_x components combined have 7 instances of leaf_0 and 1 instance of leaf_0.

When I request a BOM, I expect the parts for the top_0, but I also get the parts in the “original” “leaf” sheets and the original “mid” sheets.

I suspect that I’m not using the correct paradigm for hierarchy. In other systems I’ve used, one creates a sheet and if it is to be used as a sub-circuit (to be used in a higher level of hierarchy), a symbol is generated that represents the sheet. Then this new symbol is used in higher sheets to represent the leaf sheet.

It appears that in KiCad the original “sub-circuit sheet” has to be created where it is to be used first (the first instance). Then other instances use a link to this first use.

If this is the case, then if I delete my original leaf_0 file, then won’t all of the links to that file be broken?
How can I replace a link to the leaf_0 file with a reference to the actual file, so I don’t get extra parts in the BOM?

By the way, printing the design is also an issue… In the real design the “mid” sheets have many instances of the “leaf” sheets. So when printing, I get many (many, many) copies of the same circuit. What I expected was a single copy of the leaf circuit…


I think the key to understanding child sheets in KiCad is that there is no “template” sheet and then “instance” sheets. Every sheet of that type has equal standing. So every instance is in use.

OK, thanks… So I need to “delete” the “template” sheets… I guess this means I have to capture “top-down” rather than “bottom-up”. I’m used to doing this by defining the leaf cells then putting them together…

Thanks again…

By the way, printing the design is also an issue… What I expected was a single copy of the leaf circuit…

You could look (and maybe upvote) at gitlab-issue #2297 (Add option to plot each hierarchical sheet only once in eeshcema (lp:#1806172) (#2297) · Issues · KiCad / KiCad Source Code / kicad · GitLab), thats a wishlist-item for this demand.

Well, if you look at the multiple copies they are far from equal one another!
The refdes are different and the multiple sheets MUST be there. How can you debug a physical board without parts of the schematic?

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For some needs, like inspecting the schematic in pdf form, one instance per sheet is really enough. You can see how it functions. Or do you think that the inspector wants to read through one sheet, then look at another and compare the reference designators?

Agreed, also for numbering RefDes on hierarchical sheets I usually use the “fixed offset per sheet” function. An additional bonus would be to have an indication of how many instances of the sheet are used, and maybe an extra table with RefDes. substitutions.

i agree that there are tasks when having the full stack of sheets can be cumbersome (MUST is a bit strong position maybe :slight_smile:)
but still i think is important to have the pdf with the complete information, i give you just a couple of examples:

  • when i do board validation i’m usually in the lab and i don’t like to have PC monitor kb & mouse on the desk; i usually i print the schematic on single sided A3 paper and do pencil work on the print.
  • when i give schematics to 3^rd party i never give the sources, but just pdf printouts.
  • when you prepare document folders for certifications (for example for medical stuff) you need to provide the complete sch in pdf form.

so a configuration flag to let the user choose to explode or compress the hierarchy could be more then welcome, but if i have to choose one or the other, i’d rather choose the bloated form.

there are things that are matter of personal preference, see for example the ‘gray out’
or ‘bold crossed’ form for DNP; i like the gray-out but i can live with crosses, no loss of
functionality in both cases, just minor inconveniences.
For the missing pages in the pdf printout, i don’t think is acceptable the loss of functionality.

Nobody has said the full version wouldn’t be the default, and minimized an option. If you read the feature request again, I explicitly mention “option” and “possibility”.

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But most of my experience is from IC design where leaf cells (be it a group of transistors, a gate, or a collection of gates) could be captured as a cell, then replicated. Printing a schematic of the design there didn’t print every instance of every leaf cell, but rather produced one. There were other ways to reference a particular instance of the leaf cell.

Are you using KiCad (FOSS in general) for IC design?
first time i see someone doing that!

No… Not using KiCad for IC design! Just stating that most of my use of schematic editors was before I “retired” and most of that usage was for designing ICs. Same basic principles though…

You may get into trouble while trying to make transistors out of FR4 doping it though…

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