Hierarchical I2C Addresses

[philomelus]

I have a project where I have 4 total sheets, with 3 sharing a single sheet (for a total of 6 sheets). On the shared sheet I have an I2C IC, and I need to make the address of each IC different. I created 5 hierarchical labels on the common sheet for SEN, SCL, SDA, SADDRA, and SADDRB. On the root sheet, I connected the SCL of the 3 shared sub-sheets together, and then to the SCL hierarchical label from the MCU sheet. Did the same for the SDA line. There are separate SEN’s for each instance, and I created separate hierarchical labels for them on the MCU sheet and then connected them to the appropriate sheets SEN’s.

For each instance, I made the addresses different by assigning the SADDRA/SADDRB different for each sheet. For example, on first instance they are both connected to GND. On the second instance, SADDRA is +5V and SADDRB is GND.

When I annotate and then create the PCB, the SEN’s of each sheet is a different net and the SCL/SDA’s of all instances are shared (with the MCU sheet), so those 3 hierarchical labels are working as expected.

The issue I am having is that I cannot set the address of the 3 I2C clients. On the PCB, I cannot connect any of those pair of pins, as they all have the same net (SADDRA and SADDRB), even though they are not connected “together” on the root sheet.

I have tried multiple combinations of global/local/hierarchical pins and been unsuccessful in getting the nets to be different on the 3 instances of the shared sheet like they are for the SEN’s. I also tried marking them Not Connected, and it did exactly as I expected on the PCB (not allowing me to connect to those pins). I even tried just leaving the pins unlabelled and unconnected (with the corresponding DRC errors) and got the same result.

Does anyone have an idea of how I can force the pin pair on each instance of the sheet to be different? I don’t know if this is something I am not understanding or if this just isn’t possible with power nets.

[Rene_Poschl]

A few screenshots of the schematic or a link to the project might help us understand what you mean

[bobc]

I tried a simple example (Kicad 5.1.2) and it worked as I expected:

[philomelus]

I tried a simple example (Kicad 5.1.2) and it worked as I expected:

Did you attempt to create the PCB? I can also get it to work on the schematic, but when on the PCB it won’t let me actually create the GND and +5V traces between the pins and modules (e.g. add track on A0 to GND, and it refuses to attach to GND regardless of whether its via, another track, or copper pour).

[philomelus]

OK, I tried this from scratch, and it works. Now I am confused, but at least I have two projects with one working so I can see what the difference is (nice that everything is text file based for this reason!).

Thanks for the help, as I dunno that I’d have attempted it from scratch to see if it works otherwise (should have, but it wouldn’t have occurred to me …).

EDIT: Update

OK, I figured out away around the issue. Once I added global labels on the ROOT sheet for the +5V and GND lines, it works as it should. Not sure why I need to label them specifically, as I originally created them via placing a power symbol so they should be automatic, but its done and works.

Again, thank you, as I’d not thought to look in this direction.

[halachal]

just for the future, posting your files would likely have gotten to the final solution much much quicker.

[philomelus]

much much quicker.

I dunno about that, but it would have cost less time for those who helped, as I’d have had to create a simplified version and would then have stumbled on the fix without help (there are literally more than 20,000 nets in this project … so posting the full files would be over kill for this one issue).

Acknowledged.