Help figuring out why zone won't fill

[adjuarez]

I am trying to create a split power plane using multiple layers. I can’t figure out why the second zone won’t fill. Here is a picture of the project

If anyone can help me figure this out I will be very grateful!

[Rene_Poschl]

Have a look at this old topic.

Filled Copper Zones not showing up in Gerbers/Printouts/3D view

So this is my first KiCAD project, and I can’t figure what I’m missing when it comes to filled copper zones. I seem to be able to create them just fine, but they don’t end up on Gerbers, or print outs, or in the 3D view. See the screenshot below. [image] The left window is pcbnew in default mode, showing three copper zones, on three different nets. They only show up with the hatched fill, which is necessarily consistent with what I’ve seen in some of the tutorials on the 'net, where the fil…

[adjuarez]

I have multiple pads tied to the 5V net within the zone and the zone is set to that net, I’m not sure why that isn’t working

[adjuarez]

Could the problem have something to do with the fact I am using voltage regulators?

[Shack]

Not at all
Did you set the priority?
And can you possibly Upload your board file here?

[adjuarez]

Yea just tried changing the priority
DPS_Challenge.kicad_pcb (134.0 KB)

Here’s the pcb file

[1.21Gigawatts]

Is the zone on the same layer as the pads?

[adjuarez]

Ok, I changed it to the top copper layer and it filled in. I thought if you created a new layer and had it as the same net as the pads they would connect.

[hermit]

Good call. I just ran a trace and put a through via down in the zone, hit b, and it filled.

[adjuarez]

I think this is how I want to do it, the design requirements call for a split power plane, so I don’t think I want the multiple voltages on the top copper layer.

[hermit]

I’m pretty novice so I really try and stay out of making actual design recommendations but it looks like you are adding expense that doesn’t need to be there making this a 6 layer board.

OK. You last message came in as I’m composing. Does split mean different layers at this point? You have a 5V, 3V, Power and GND? Disclaimer, I’m enjoying the ‘fruits of my labor’ from one of my other hobbies, home brewing, so I’m probably missing something but I don’t seen anything on that board that requires any real power. You have a micro processor, a 232 chip and some headers.

[1.21Gigawatts]

Split planes can be on the same layer. Where possible the grounds plane should be on an adjacent layer and signals on the other two. The cost of a PCB increases significantly after four layers.

[adjuarez]

I’m probably more novice, this is my first board. I am trying to make a 4 layer board that has a split power plane. I couldn’t figure out how to do this with just four planes but found a discussion that said doing it with 6 layers that don’t overlap would essentially do the same thing. If you could help me do it without the extra layers that would be awesome!

[hermit]

You have three non overlapping zones as it is so those look like they could go on one plane.

But…

If you are willing to share your design and what you are trying to do starting with the schematic so people know what you are trying to accomplish, that would be the best start.

[adjuarez]

Yea, I think I just now got that, you just assign the different planes to the separate nets right? I went ahead and switched it to a 4 layer and made the planes. Basically, I’ve been told to make a board using specific chips and with some design requirements (4 layers, split power plane). When I started 2 days ago I had no clue what the chips did or how to interface them or how to use KiCAD, but this is where I’ve gotten so far.
Here’s my schematic and my updated pcb:
DPS_Challenge.sch (17.6 KB)
DPS_Challenge.kicad_pcb (139.2 KB)

I still have to connect all the nodes of the same net to the power layer somehow, is using a via the best way for this?

[hermit]

Screen shots of the circuits would work best so everyone can see them. If not that then zipping the working directory is best because some of the parts aren’t loading for me. From what I see though, you have very few traces so this should be a fairly easy 4 layer board.

[adjuarez]

Hey sorry for the latereply, I got it to work I just wasn’t sure how to use vias before. Your comments really helped me in my first design, I appreciate it!

[cflin]

I, too, have an issue with the latest version of KiCAD (4.0.7) on Ubuntu 16.04.3LTS showing filed zones. I generated a polygonic filled zone tied to GND on one plane, then copied it to another plane. The original filled zone does not show as such in Cairo and OpenGL (even after telling KiCAD to fill all zones), but does show up as hatched in the legacy (default) viewer. The second zone (copy of the first on a different plane) shows up the same (totally filled) in all three viewers…