The datasheet seems to contradict itself regarding the use of an exposed pad for these. The pin table and also the overviews at the start of the datasheet do not mention an exposed pad. But the package drawing seems to indicate that there is one.
I never used PICs, but could the exposed pad also be free floating, not connected to anything, just for heat sinking purposes (or maybe as mechanical mount)?
But I didn’t see any mentioning of the QFN packages being rated better thermally… so.
The package drawing lists it as “Optional Center Pad”, so I suspect you are OK without it. Other PIC16 datasheets specify that the optional pad can be connected to Vss, so I assume the same it true here although I probably wouldn’t implement that on a design without contacting Microchip to verify.
We can add the ep pad to the symbols but not connect them. (we could add them as not connected pin types)
Maybe even show that pin to give the user the choice what to do with it.
If I make footprint for this, I would name something like QFN_EP, and name the Expose Pad as EP. For this IC it may not need to use this Pad, but for other, I would name the pin in the symbol as EP when the part use that EP. I think symbol pin map to footprint pin should be more flexible than now, mean user should able to the change the mapping if needed. Because there is not standard way to name the Expose Pad, and what it should connected to.
Yes we do that. We do not only include the fact that it has an ep but also the size of it in the footprint name. (See the library convention)
The name would be something similar to QFN-20-1EP_4x4mm_P0.5mm_EP2.7x2.7mm (or QFN-20_4x4mm_P0.5mm if we decide against the use of a footprint with exposed pad)
I argue strongly against that. Right now the strict requirement shifts some of the responsibility for a correct circuit over to the library team. As soon as you have your trusted parts in the lib then you do no longer need to worry about it. If you introduce flexibility here then you open up a whole bunch of possible error points.
Yes there is. It always has the pad number one larger than the highest normal pad number. (There are very few exceptions to that. I have never seen such an exception in a normal qfn or similar package. Specialized packages are a different story.)
My guess is that this is defined in the JEDEC standards.
This is normally defined in the datasheet of the component. A symbol is only valid for one component and can therefore be tailored to it. (We require symbols in the official lib to be build this way. Generic symbols are limited to a few libs and a few device types.)
The question here arose because microchip does not define anything for the EP other than its size in the dimensioned drawing. This is not in line with what i would expect from such a company.
This makes me a bit worried and is the reason why i asked here. (My guess is that the qfn package was introduced later to this series of MCUs. And the documentation got only half updated.)
It is a very dangerous way of doing it for EP, it can cause unintended connection when user try to switch for difference footprint on the same symbol, and yet, datasheet not number the EP this way… So it is not a good way to me.