I’m prototyping several modules and find it would be a lot easier if there were a way to generate a wiring list. Basically a human readable list of all devices connect to each net. This would greatly simplify the hand wiring process.
I’m not a coder so anything requiring learning python or scripting language or the like just will be to time consuming.
Try: Eeschema / Tools / Generate Netlist File…
These netlist files are human readable text files, but the main purpose is to be interpreted by your PC. You have to decide whether any of the 4 supported versions are adequate. I also see an “Add Plugin” button, but never used it myself.
I just took a close look at the pcbnew net text output and it is easy to strip out the netlist by hand. The netlist is at the end of the file.
Thanks
I’m not sure if understand well what you have really to do but ‘picture is worth of thousand words’.
Once on my 2-layer PCB there were 3 connections to be done by wire. I placed them at one extra layer (so even DRC was satisfied) and printed it to show that connections to human who had to do them.
If your connections crosses you can use many layers to avoid crossings at one layer. So your documentation will have several pictures but they will be clearly readable.
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