I have a two layer board with both pours on GND. Many pins on this chip are grounded and I’m trying to connect them via the top pour but also pull it back a bit so I can still easily solder the part. I don’t want thermal relief because this is an RF design and I want to avoid parasitic inductances to the ground plane. The pad connection setting is therefore set to Solid. Now when I pour, it claims to not be connected to ground even though the pads and the pour are clearly touching, especially the center pad. Any ideas what I am doing wrong?
AFAIR, connectivity is currently decided by overlap of the insertion point of pads (where the ends of the ratsnest lines are). There are probably a several ways to get around this issue, but the two that I can think of at the moment are:
Ignore this. Problem: no way to tell KiCad that you have evaluated the situation and to not tell you about it again. Thus you will have to continually remember to ignore the reports of this issue.
Draw thin trace stubs that to connect the insertion points of the pads to the plane and/or vias. You won’t see the thin traces because they will be fully swallowed by the larger copper features, but that will at least allow KiCad to realize that there really is an electrical connection.
For the bottom row of pads I suppose you could move the edge of the keepout zone that you are using for pull-back up to the middle of the pads like it is on the sides of the zone. But that won’t solve the center pad issues.
Have you made the exposed pad with several pads because you wanted to have several smaller paste areas there? It’s not the best way. Make one large pad with only copper layer and several small pads which have only paste layer and no copper.
