Getting tolerances/clearances from Altium board

Layout
1

Hello all,

I am trying to get the tolerances and clearances from an open source Altium board for a project that I am working on for a client. I am linking the repo that I am trying to get the tolerances and clearances from:

Is KiCAD able to import these tolerances and clearances? If not, what are my options?

If there is a kind a stranger out there that has Altium, I would really appreciate it if they could open up the project and post the tolerances and clearances so that I can use those in my board layout.

2

Tolerances and clearances of what ? they are usually mechanical attributes . . . can’t you simply ask the owner of the GitHub repository ?

3

It would be tolerances and clearances of the PCB layout. All of them.

I am not sure how long it would take for the person to reply so we could see

4

Did you already try importing the board into KiCad?

5

Tolerances on holes typically are set per hole (although I usually have a fab note that says “if not specified, use this”).

Clearances:

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Looks like

  • Anything in the 12V class to everything else: 0.3mm
  • Component PCB900 to Component PCB900 is allowing… zero? not sure what this one is doing (allowing overlapping pads? too close pads?)
  • This one:
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    query1 is
    (InDifferentialPairClass(‘All Differential Pairs’) AND OnLayer(‘L1 [TOP]’)) OR (InDifferentialPairClass(‘All Differential Pairs’) AND OnLayer(‘L4 [BOT]’))
    and query2 is
    (OnLayer(‘L1 [TOP]’) AND InPolygon) OR (OnLayer(‘L4 [BOT]’) AND InPolygon)
    -Clearance_Diff is using queries of InAnyDifferentialPair and it’s using 0.75mm for everything
    -Polygon’s are 0.2mm
    -The generic clearance is 0.15mm

Those rules are in order of predence.

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6

Looks like they forced soldermask tenting on vias in an odd manner:

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But it works. [You can control it on per via too.]

Planes are using 0.5mm pullback

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Vias go direct to polygons (floods), but so do this component:

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As to tolerances, none of the holes are using tolerances.

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And no callouts in the PCB file.

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Edit: hit send too soon.

The assembly folders have pdfs that look like they are from Draftsman, but I don’t see a Draftsman file in the source files (maybe I need to download all? I’ve yet to figure out git, sorry). But I’m not seeing any sort of fab drawing callouts that might give instruction. But unless if those are PEM’s under whatever module that is, nothing here indicates to me that anything other than standard tolerancing is required.

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1 Like
8

@supton Huge thank you! This helped me with the board layout