Gerber editor / tiling one design for manufacture

Hi all.

I have a small board i’d like to send to JLC PCB for manufacture.
To take the most advantage of the 100mm x 100mm space i’d like to tile the design so as it’s manufactured with scores in it and i can snap off the pieces as required.

I have previously attempted this in KiCad and it kind of worked, but all my ground connections to the flood were lost. I think the simple cut and paste i tried to do broke things.
The boards were scored nicely however, and clearly the edge cuts through the inside of the design worked fine per the JLC suggestion they would be taken as score lines.

So i think i need a gerber editor or a script to generate a tiled gerber file.

Anyone have any experience or suggestions they could share?

It’s called panelisation. Look for software called Kikit.

Agree that KiKit is a good way to go. Here’s a simple design I panelized with it recently:



The commands I used to do this are in the Makefile:

Is panelization ourselves likely to incur additional charges on top of the $2 JLC PCB Prototyping service?
If not then full panelization is perfect.
Unfortunately I’m on Windows so i suspect the learning curve is going to be steeper, and the need to install KiCad an additional time is a little annoying, but can’t hold that against an open source project.
Will see how i go and report back.

Yes JLC may levy an additional charge because of the extra stage, you have to ask. I have also encountered other fabs that don’t charge extra.

JLCPCB has some checkboxes for panels made by you or by them and it dynamically adjust the price for your orders.

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