Footprints with GND-vias/zones?

This kind of “painting with pads” seems to be the way to create footprints with GND-zones and vias?
This one is a land patter from mini-circuits: https://ww2.minicircuits.com/pcb/98-pl052.pdf
Or is there a better/smarter way of achieving the same results?

However the hidden THT pads are not compliant with KLC F7.4: “THT pads have incorrect layer settings, missing layer *.Mask”
Maybe the benevolent dictators of the KLC and libraries can make an exception for these kind of RF-footprints?? :wink:

This is just because our scripts are not powerful enough. There was an attempt to get the script to know that a pad is a via not a real THT pad. That solution created more problems than it solved. So we decided to accept the false positives (for now).

An alternative way of drawing these footprints/land-patterns with large GND-zones and many GND-vias is to just draw the vias and pads of the component. Then mark as “solid” the GND-pads, and use a custom clearance on non-GND pads. This is simpler because we do not have to draw SMD GND-pads where we want a GND-zone, instead we rely on the user of the footprint to draw the GND-zone.
Here’s an example;


When pin-1 (and the other GND-pins) is connected to GND and we have a user-supplied GND-zone we get:

which is what the spec looks like: https://ww2.minicircuits.com/pcb/98-pl005.pdf

Could someone from the library-team comment if this style of footprint-drawing is OK?
(the alternative is shown in the first post of the thread, i.e. explicit SMD GND-pads where the footprint-spec needs GND-zone)

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