Footprint naming convention clarification

Layout
1

I have a part that I need to determine if a “standard” SOIC-8 footprint will work with my pcb layout. My chip documentations says it is an SOIC package. I then look at the Kicad footprint Housings_SOIC:SOIC-8_3.9x4.9_Pitch1.27mm. Looks close, but the dimensions on the spec sheet don’t correspond to the 3.9mm or 4.9mm.

I am looking for an explanation of which dimension the 3.9mm and 4.9mm represent. I have looked in the Getting Started Help, the PCBNew help as well as on the conventions listed on the KiCad Library Conventions page https://github.com/KiCad/kicad-library/wiki/Kicad-Library-Convention and cannot find the answer.
Thanks!

1 Like
2

post the chip model name and doc

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3.9x4.9mm matches the plastic body of e.g. an ATtiny45 (SOIC-8 0.150in wide)

4

Madworm: Aren’t the numbers in the footprint name supposed to correspond to the pad size/spacing and not necessarily the plastic body size?

Maui: New user - can’t upload attachments so here is the link to the spec sheet: http://ams.com/eng/content/download/250445/976533/TSL250RD_Datasheet_EN_v1.pdf

5

@CktMaker
it seems a standard soic 8


3.9x4.9 as @madworm pointed out is the plastic body dimensions (you can get some tolerance)
just pad size is slight bigger (2.25 instead of 1.78)
842×590 26.2 KB
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Thanks Maui. Where did you get the 1.78 for the pad size? Did you measure it using the Footprint Editor?

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Soic-8pd.pdf pag1
Mounting Pad Geometry
:smile:

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Ok… I know when I created a custom schematic symbol there was a field for the documentation under the Component Properties dialog. However I don’t see where to find this docuement when using the Footprint Editor or Footprint Viewer. Only after doing a web search of SOIC-8pd.pdf did I find that document. Is there somewhere in Kicad where I could have found that?
Thanks again.

9

The body width does affect the pad position, if not the pitch. There are narrow and wide SOIC variants, so the nominal body size is a guide. Parameters E and F in your Central Semi datasheet match the 3.9mm and 4.9mm.

I suppose that the overall lead width could also be used to specify the width, but I think convention is to use the body size.

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I don’t think there is any doc in Kicad which specifies dimensions of the footprints, there is footprints_doc but that only contains a preview of the layout.

I assume that JEDEC or whoever publish a reference standard, but they usually charge for them. So the best free source is manufacturer datasheets, but allow for slight variations.

Wikipedia can also be a useful source https://en.wikipedia.org/wiki/Small_Outline_Integrated_Circuit

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Actually JEDEC JEP95 series of standards is free for anyone. They describe most of the standard packages for ICs and active components: https://www.jedec.org/category/technology-focus-area/jc-10/registered-outlines-jep95

1 Like
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Cioma, thanks for the link. Although they don’t provide pad layouts, only package dimensions, this is still great reference!

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The best place to get pad layouts (i.e. footprints) is here: http://www.pcblibraries.com
Download and use free Library Expert Lite: http://www.pcblibraries.com/products/compare/

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Thanks again cioma. It doesn’t look like they have a Kicad specific version yet. Which is the best other package to start with for importing? Which 3rd party format do you find is the most seamless for importing?

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Well, you might try Eagle as Kicad should have native support for Eagle footprints if I recall corectly.
But in my case I simply create footprints in KiCad based on Library Expert calculations.
Indeed they don’t have KiCad export yet but it might happen one day if we all ask them nicely on their forum :wink: