Having multiple boards in one design. All board share common GND. Board are separated using mouse bites, Wish to avoid the DRC to error on GND not connected between boards. Do not want to use scripts but just a mouse bite footprint. 1st issue: it seem not possible to create a NPTH without copper clearance for a particular pad (in or not in a footprint) ? Changing the pad as through hole instead of NPTH to the GND net removes the clearance and of-course the DRC passes. This solves the issue. then When attempting to change all the TH to the GND net, a little bit annoying issue found: when selecting all the through holes (SHIFT key), and selecting properties, can’t change to net of all the pads at once, so need to change then one by one…
Understand for breaking the boards out, to remove the coppers to reduce breaking force. So perhaps keep just one as TH and others NPTH.
Shown below: 5 mouse bites , 4 of them NPTH and one TH.
well, in the cases were I have multiple boards, that would in real life share a common ground. i use different gnd such as vgndagnd for each board in the schematic side. that way the pcb side of things are separate, but the same.
doing this, one could have mouse-bite footprints using NPTH without the issue of DRC. it is also less error prone, as you can see what is going on ground-wise EDIT: and your ground planes will look uniform.
Yes, thank you , you it it right. Actually previously I used hierarchical labels but had to remove them.
I do not prefer to set the global constraints to a "dangerous’ value of 0 and then set for all other net clearance as other nets to be satisfy 0.2mm spacing. NPTH are not nets so no clearance rules can be set for such.
For NPTH the overrides for pad and paste clearances cannot be used. for PTH they can while for PTH Kicad fixes the clearance to the board minimum one.
Now there are 3 options, both not most preferred:
Use NPTH. in this case the signals of the layers won’t connect.
but allows breaking the tabs with less force and less risk of damage due to less copper . This solution has DRC errors
Use PTH or NPTH and different GND naming per sheet without hierarchical labels. This will not have DRC errors but this feel more like a hack an not convenient…
Use NPTH or PTH, set minimum global clearance to 0 and for all other nets to the minimum required. This allows NPTH w/o clearance and GNDS of boards will connect. This could incur a danger that some clearances may be too small. It also results in copper of the tabs.
There is no real good solution. Really wish for a generic solution for multiple boards per project:
Does not need to change the global min. clearance to a “dangerous” (0) value
Allows to use hierarchical labels shared between boards that don’t create DRC errors.
Does not need to fiddle around with the clearance in the tabs
Allows for NPTH (in a footprint) to override the min pad clearance.
Allow to apply a keepout area in the “mouse bite” footprint.
To avoid DRC errors for multiple boards, perhaps could be done by having a setting to define a hierarchical label as “virtual”. That is the label defines there is no physical connection (DRC) but a logical one one (ERC) between boards. So error may shows up ERC as usual , but not in the DRC or as missing traces in the PCB layout…
well, the honest truth of the matter is. it is a hack to put multiple boards in one project. it is designed for one board, one project. this is expected behavior of kicad.
as for #5 Allow to apply a keepout area in the “mouse bite” footprint.
You are right about #5, Fiddled around with that and came to this ide as a compromise to connect the ground, but with less copper in the layers of the tabs. But the issue I have now is
The minimum annular ring board setup constraint seems to change when I change the hole size as you can see for these two holes. This solution seems valid and the trace is GND, but can’t get this to work.
The min constraint in board setup is 0.15mm , the hole is 0.6 for the upper pad, and for the lower pad it is 0.2. Pads both are 0.8mm. Thus for the below hole the AR = 0.8-0.2/2 = 0.3 so it seems the “actual” and “constraint” are swapped in the error fr the lower hole, while for the top one the error is correct. Perhaps it is because I did not have my coffee yet
In below example, upper hole is 0.8/0.2 and lower 0.7/0.3 with a board setup min AR of 0.15 this passes. Why would an AR of 0.3 not pass with a constraint of 0.15
This any still not a solution,what could be a solution is to allow to override the AR size in the overrides of the pad .
The following is my final, a little bit compromised, solution. All are 0.8/0.8 NPTH, A keep out area for the tab and just one PTH 0.8/0.5 on each side linked to the GND of the rail .(only needed to do once for one mouse bite for a board). All holes with a mask clearance of 0.2 to reduce the breaking force even more and make the physical breaking line cleaner to reduce filing needed. Elegant, zero DRC errors and works without hacks . Hope this may help someone.
Correct. two constraints, The global one for everything and one in the footprint itself because it an exception case. This solution works very well, as only one bite - of the many bites that keeps the board in place - needs to connect GND. P.S the keep-out exempts traces, so the DRC is fine.
Still don’t figured out why the “actual” and “constraint” were swapped in the error. but well, that maybe something the kicad coders may look at.
