I’ve noticed that when adding filled zones, it doesn’t recognize SMT pads as being connected unless the zone intersects the center of that pad. Shown below are “un-connected” pads L1(1) and D2(1).
Now, my easy work around for this is to make a long branch of the zone inside of the pad to reach the center. This won’t actually change any physical aspect of the design, but it allows kicad to pass the drc. Below is an example of how to fix…
This works, but it’s crude. Is there a more common/acceptable way to solve this? I feel like I’m probably just missing something.
create a ‘seeding’ track for the zone coming from the pad?
The beauty of zones really is that you don’t have to define their outlines, the algorithm and priority levels will take are of that for you.
Looking at your design I would have changed the track width and connected D2/#1 and L1/#1 and C17/#1 with something like 1mm wide tracks… going to the LM?/#1 something like 0.4 mm wide or whatever still makes it.
No idea why you’re trying to do tracks with zones…
PS: if you switch pads into outline mode you can better see what you’re doing.
I never route with pads in filled mode.
[quote=“Joan_Sparky, post:2, topic:6774, full:true”]create a ‘seeding’ track for the zone coming from the pad?
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By seeding track, do you mean similar to my 2nd picture above? Except, using a track rather than part of the zone.
I was more or less following TI’s suggested layout for the regulator. I know it’s not required to follow them exactly, but I see no reason to deviate drastically.
Same here… the track ensures you have a basic electrical connection, and the zone dumps in extra copper for better thermal dissipation or minimise impedance. So I would just use a rectangular zone which captures that small area and let the copper fill the area as much as possible.
Now, I am not an EE, and there are so many angles to good layout that I am always learning. So I will put out the question, is there ever a problem having too much copper between connections? Does the precise shape of the outline ever matter?
One downside I can think of is that large copper areas can make rework more difficult, unless you have a board heater.
And that is why you connect pads to fill zones using thermal reliefs, with minimal spoke widths and antipads of 20, 30 or even 40 mil clearance.
Board fabricators usually like to see large fill zones. It reduces the amount of chemicals needed to etch away copper, as well as the disposal problem.
Why make the exception for power and ground? By explicitly running a minimum-width trace, you verify that a connection path can indeed be found when the zone-filling algorithm goes to work.
If you got a 4+ layer board with those planes, you have them to get rid of the work needed to route those nets - at least that’s how I interpreted it.
Once you start routing on those layers you diminish your options for other nets, so you don’t route them afaik.
And once you’re done with all the other nets, you probably won’t start to route those two+ nets either.
I agree with @Joan_Sparky. This would only be an issue for one or two layer boards where you might be using zones to improve current capacity. Otherwise, you want your PDN planes to be as solid as possible so you usually avoid routing other signals on these layers anyway. But in any case, I would never spend the, often substantial, amount of time it would take to pre-route power/ground tracks when I intend to use a zone. DRC will quickly inform me if there are any areas that the zone was not able to reach. And a close inspection, which I’m sure we all do anyway, would also find any areas of the zone that were not as wide as we would like them to be.
