I am new to Kicad and have moved past a number of quirks, but after completing the schematic, I have found errors in the ratsnest in PCB layout. My question is if there is something that I could do to avoid these, or if I should just use it as a loose tool and layout the PCB completely manually as I did in the schematic.
The routing offers a number of advantages, in that it can consolidate traces in ways that would not occur to me right away given that I see the circuit as a flow that for the most part moves from here to specifically there. But if I have to correct routing mistakes, then it seems I would be better off just laying it out as I did on the schematic and just use the push and shove.
If it will help, I can post a screenshot of a schematic and its board as Kicad insists it should be. It is shorting components (caps and diodes) and missing connections. Frustrating. I added junctions to the schematic, and dragged all components on the schematic to ensure the connection stuck. Could I do anything else to ensure accuracy?
So, back to EEschema, correct those errors and re-create the netlist… then back to PCBnew and import the netlist again?
If it’s OK, zip the whole project folder (there is a button in KiCAD for that) and load it up for us to check over and point out what is wrong where… ie. R1, connection with C5 (for ICs etc pin names important!) and what goes wrong with that connection in pcbnew…
Thanks for the offer. I believe that I know what is going on. Is there a way to disable design checking rules and just connect as I laid out in Schema? It does not like my circuits. I split ground a lot and use zeners in ways most consider unnatural so it seems that it is trying to correct my schematic. If that is the case, Kicad should warn you before changing and ideally point out its suggestions and give you confirm/veto power. Could this be it?
Also helpful would be how can I establish the bottom side as a ground plane at the start so that it does not hunt for ground? I am using connectors on the board so it cannot tell what is high or low side, save for my ground shunts.
Thanks. If this does not work, then I will upload a tarball and take you up on your offer to review. Thanks again!
Preferences > General > Disable ‘Enforce design rules when routing’ = no safety net for anything.
I don’t think EEschema/PCBnew know how to use Zeners at all.
As for the Ground splitting - how did you do that? Usually people drop a power symbol for ‘GND’ where they need Ground…
If you want a Ground back-plane, just draw a filled zone on B.Cu and assign it to ‘GND’.
High or low side? Are you talking voltages or physical orientations?
Personally I don’t use power flags in the schematics and didn’t had problems yet, but I’ve drawn all the symbols I use myself - so I probably miss out on some checking ability that KiCAD would be able to offer.
So yeah, without a look at the files it’s hard to tell what you’re struggling with there.
The rats nest is derived from the connections you draw in the schematic, pcbnew does not know anything about zeners or ground planes, it will not to any “corrections”.
BTW, always remember to save the netlist in eeschema and import in pcbnew whenever you make a change.
However, eeschema is a graphical program, it derives connections from where graphic symbols meet. So what you see may not always be what you get in the netlist.
The checking is there to help you avoid making mistakes, if it becomes a hindrance you can turn it off. Personally I find it like a satnav, often I don’t really need it, but sometimes I will be cruising along and forget a junction is coming, so it’s a useful reminder.