ERC - Power input pins and passive components

Schematic Library Symbols
#1

Hello,

I’m facing a recurring weird issue that makes me think that I’m maybe doing something wrong regarding power input pins usage.

The issue is the following: when I use a power output pin (be it a power flag, or power output pin of a symbol), if i connect it directly to a power input pin, the ERC does not complain. However if I add any component that has passive pins inbetween then the ERC complains that the power input pin is “connected to other pins but not driven by any pin”…

Examples:

  • “power output pin -> net -> power input pin” ERC does not complain
  • “power output pin -> net -> inductor -> net -> power input pin” ERC complains
  • “power output pin -> net -> spst switch -> net -> power input pin” ERC complains
  • “power output pin -> net -> current sense resistor -> net -> power input pin” ERC complains
  • “power output pin -> net -> mosfet -> net -> power input pin” ERC complains

The same ERC complain occurs when I add a resistor between the VSS (power input) pin of an ideal diode and GND (for instance it is needed with LTC4359 to preserve fast turn off), but stops complaining if I remove the resistor…

This is kind of annoying as the only solution I found so far is to add power flags everywhere (I’m working on a UPS with multiple power paths), and makes me feel uncomfortable as it is kind of “cheating” and thus error prone. Am I missing something ?

Thank you in advance for your help.

1 Like
#3

Hi,

Well then should I understand that KiCad’s ERC is not able to detect that a input power pin is transitively connected to a power pin if there is a passive component inbetween ? If this is the case, it is IMHO a real shortcoming.

I agree that some components do not have an input and an output, but what’s the point of being “passive” if it means losing critical information such as power ? I currently have 8 power flags due to this behavior, and can’t get rid of the one related to the resistor put between GND and VSS of the LTC4359 (adding a flag there makes no sense to me).

#4

Yes, you’ve got it using better vocabulary that I would have used. :wink: Nice usage of the word “transitive”.

KiCad is really dumb. I’m not being derogatory, just using “dumb” in the context of does not have and was not designed with any intelligence. ERC follows some simple rules to make it look like it is “smart”, but it has no way to intuit any circuit function. It doesn’t know how symbols work electrically, it only knows what the pins are defined as.

Well, cheating is a subjective term. You could choose to look at it as being forced to double check your designs to avoid errors. Design w/o using the PWR_FLAG symbols, and then carefully consider the nets where there are issues. Once you are sure the net is correct you can drop the PWR_FLAG symbol as a flag to you that it is a power net that has been reviewed. You can also leverage the PWR_FLAG symbol as an indicator of the source of the net on your schematic. Granted, I can imagine on power supply circuits it might get a little crowded with PWR_FLAG symbols, but there is nothing stopping you from making your own PWR_FLAG symbol with a smaller graphical portion. (Copy the existing PWR_FLAG symbol to one of your own personal libraries and modify the graphics to what you want. Maybe even give it a more descriptive name… Something like PWR_SOURCE or NET_SRC.)

You could change the pin type on the LTC4359 to just a regular “input” pin.

#5

To do this properly KiCad must be able to know what those schematic symbols actually mean and this would be a lot of spice like behavior in KiCad.

A possible solution could be if attributes could be added to schematic symbols with a meaning like: “Treat pin 2 and pin 5 of U4 as a short for ERC purposes”.

There have been some posts about something similar for components such as the 5.2mm x 5.2mm square push buttons which have an inherent wire bridge between two pins for easy layout of matrices on single layer PCB’s.

In the nightlies a lot of effort has been put in the DRC checks, which now also has a rules based system. If the ERC check ever gets such a rule based system, then this could probably be implemented with those rules.

1 Like
#6

I’m not asking more than your possible solution.
Being able to do this would be great.