ERC error on double MISO

In my schematic I have a display board which has two SPI interfaces, one for the display and one for touch sensing. Of course there are also two separate CS pins.
example1
I want to use only one SPI interface from the controller. Therefore in the schematic D_MOSI ↔ T_DIN, D_SCK ↔ T_CLK and D_MISO ↔ T_DO are connected. This works. I tested it on a breadboard.
But ERC is reporting an error because D_MISO ↔ T_DO are connected:
grafik

It is correct that two outputs are connected in the schematic but because of the separate CS only one of them will be active.
Is it necessary to define D_MISO and T_DO as tristate outputs or is there a simpler way?

options:

  • just ignore this ERC error
  • in the ERC dialog: “Exclude” the violation
  • in schematic setup–>electrical rules–>violation severity completely disable this check
  • your proposal to define D_MISO and T_DO as tristate pins will also work

Remember, ERC is dumb, it only checks pin types on a net for compatibility statically. It doesn’t know the clash will not occur due to other factors. So use one of the solutions given.

In order for SPI to operate correctly, paralleled MISOs on slave devices should always be tristate electrically (controlled by the CS inputs). ERC is helping you here. And no, there is no “simpler way”, there is the correct way.

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I believe MISO should be Tristate, IIRC this also solves the ERC

Correct. Output means always driven. Slave MISO outputs should be Tri-state, activated by CS

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