ERC CHECK errors with capacitor (not driven by any pin)

[Panda9394]

Hello everybody,

When the circuit run ERC CHECK, there are some errors in power input pin 1 & pin 8. Did I place PWR_FLAG not correctly?

If yes, How can I place PWR_FLAG to solve the error?

Thank You!

(The circuit is only for testing ERC)

[Ralph_Loveday]

Have a look at this https://www.pololu.com/file/0J807/drv8838-motor-driver-carrier-schematic.pdf
VCC & VM are not connected to a power source in your diagram.

[paulvdh]

Do you know what capacitors are and how to use them?
Capacitors are an open connection for DC voltages (after some initial charging time)

So both C1 and C2 prevent your IC from being connected to their power sources.

C3 is connected in a similar way, and this almost certainly does not work in the way you expect it to. I’m not even sure what you expect it to do there.

You are also using capacitors from the pspice library. These are big and ugly, and a remnant from a very old past. Instead, use capacitors from the “Device” library.

[Panda9394]

Hello paulvdh,

Yes, this is my big mistake, the capacitor should not be in this position

Thank you for your reply !

[SembazuruCDE]

Yeah, but even without those capacitors, you would still get an ERC violation on your +V net. Next to your two PWR_FLAG symbols for GND and +5V you should put a third for the +V net.

The way you used the PWR_FLAG symbols on your schematic is only to clean up ERC violations. This is valid, but IMHO a waste of the potential documentation usage of the PWR_FLAG symbols. I use them as an indicator on the schematic of where the power sources are. Therefore if I were drawing this schematic, I would put one PWR_FLAG on either side of the battery because that is your “source” of your GND and +5V nets. I would put the third one on the “output” of the Schottky diode because that is the “source” of your +V net.