Eeschema ERC frustrations

Schematic
1

V5.1.1-1 new install

I’ve a problem running ERC that it gripes about many instances of the short wire connections to GND and other Junctions. Visual inspection shows no miss aligned connection and no square outline of the wire or Gnd symbol end. The wire has not run over the Gnd pin. It looks ok.

I’ve Del the wire and drawn in a new wire. Sometimes this fixes it, other time not.
Del the wire and the Gnd symbol and done a Copy/Paste (short wire and GNd) from another place that does not have a DRC error and the I get aERC error.

I’ve also had an IC with 2 pins tied to separate instances of Gnd. One good, one bad. I fix the bad one, run ERC and then it points the the adjacent previously good Gnd as an error.

I can Drag the Gnd or component and it visually stay connected, but still gives ERC error.

ARRRRR… (:sunglasses:

2

We can not help you if you do not state what the error message is. (We could make assumptions but that might lead you down a wrog path.)

3

sorry, the ERC window shows:

"Pin connected to other pins but not driven by any pin
@ (xmm, ymm) Pin 1 (Power Input) of component #PWR0118 is not driven (Net 1).

4

image
image1874×1003 119 KB

image
image605×663 46.7 KB

5

Short answer: add the special symbol PWR_FLAG to the net in question to tell kicad that this net is driven.

If you want to get the most out of this check then place that special symbol as close as possible to where you supply the board. More details see: ErrType(3): Pin connected to some others pins but no pin to drive it

6

Thank you. I had omitted the Pwr_Flag on the Gnd line as I thought the GND Symbol WAS as power flag.

image
image630×525 37.8 KB

Apparently the GND symbol is NOT a flag in the same sense as Pwr_Flag?

ps - I’m looking forward to meeting you in Chicago next week.

7

Please have a look at this. A simple 3 term reg.

image
image1768×1003 157 KB

ERC says there is a Conflict as the U2-2 (Vout) is an Output and
the Pwr_Flag is also an Output.

image
image605×663 52.9 KB

image
image1288×816 119 KB

8

btw - I did read the refernced articles. I interpret the discussion to state that the Pwr_Flag should be added to the +12V as there is no apparent source of +12V (in comes in via the connector).

Not discussed, is that since the LM7805 PRODUCES +5v that there should be No Pwr_Flag on +5v.

Is this the correct interpretation?
Thanks

9

Yes, the AMS1117-3.3 (LM7805 huh?) has a pin defined as a “Power output”, and one “Power output” can serve many “Power Inputs”. In fact, you should only have one “Power output” on any net.

There is nothing special aobut a PWR_FLAG. If you look at it’s symbol in the symbol editor you simply see it is just a schematic symbol just like all the others. It has:

1). #FLG = Reference field. the “#” surpresses the symbol from appearing in a netlist, and from getting numbered during annotation.
2). PWR_FLAG = Name of the component.
3). A pin, defined as a “Power output”.
4). A few graphics lines, a diamond with a tail on the bottom.

If you do not like to see PWR_FLAG symbols, you can set the connector pins of the power input connector to pin type “Power output”., but of course that does not work if you have an AC power input and a bridge recitfier, or input filters, or … .

If I get messages about “… not driven by any other pin” and it is a net with a voltage regulator, then I usually set the output pin of the voltage regulator to “Power output” (This may be considered a bug in the library if not set so?). or I add the PWR_FLAG on a spot where it is logical, such as on the last output of a power supply built from discrete components, output of a bridge rectifier, etc.

If that is not enough, It’s time to think about what’s going on and why ERC is (still) complaining.

10

This topic was automatically closed 90 days after the last reply. New replies are no longer allowed.