I know some background work is being done on this issue, but is there a way round getting DRC errors when same-numbered pads are stacked in footprint? I need to have different shapes for bottom pad and top pad and have followed the suggested workaround to overlay two pads with the same pad number. The problem is I get millions of DRC errors all telling me tracks too close to through-hole or pads are too close together. See sample below:
The problem is probably something else than stacking pads. But itâs impossible to help by looking at the screenshot. If the design isnât confidential you could attach the zipped project here and a helpful answer is almost guaranteed.
If you canât or wonât post the project itself, then the exact text from the DRC window might help.
Also, the arrows for DRC errors are not always placed exactly on the error, but usually they are close.
Iâm also confused by the purple pads. THT pads are yellow, while SMT pads should be either red or green, depending on the layer. Purple may indicate an âaperture padâ, but those should not have pad numbers at all.
But without being able to inspect the project itself itâs mostly guesswork from here.
Sorry eelik and paulvdh for late response. Here is the design file. Yes paulvdh, I think the purple is an aperture pad. My simple intention is to make the top TH pad smaller than the bottom one and you can see the red smaller pad. Once I did this, I was simply left with the purple coloured object.Tx-TB-Controller-1.zip (2.0 MB)
At least in one place you have overlapping via and THT pad hole. Thatâs not allowed and leads to âdrilled holes too close togetherâ error.
If you make overlapping pads with the same pad number they must not both be THT. Only one should be through hole, the other one should be SMD. Otherwise there are two overlapping holes which isnât allowed.
Also, it looks like you have to make the THT pad for the smaller pad (the front) and select both copper layers there, and the SMD pad for the larger pad (the back). For some reason KiCad doesnât seem to accept some other logical options without a DRC error (I feel this is a bug). Make also sure that the paste and mask layers will be correct.
Then you have some normal clearance violations, but there shouldnât be anything special in them.
Nice one. Thanks eelik. Iâm sure this process should be more straightforward when we have pad stack controlđ
Iâm not sure where to start, and what to write.
Lets start with this:
That is 7 PCBâs in a single project, and that is not supported. Maybe you can work around it with home etching, but if you want to make gerbers and have it manufactured this will probably get you into trouble. Somewhere between your gerber files getting rejected or extra costs for manual adjustments.
In the row of 6 adapter PCBâs at the bottom, you have a lot of the same or very similar errors. The next time you do something like this, first do a single PCB and get it DRC error free to get your workflow right before you make the others. Now youâve made them all faulty (which took some time) and you have to fix them all (which takes more time).
If you turn off F.Mask you can clearly see that you have an overlap between the thin line that indicates the clearance boundaries and a pad. Such things always result in an DRC error. These are the âTrack is too close to Padâ errors in the DRC listing.
When I look at the same area in the 3D viewer, you see exposed copper of a track next to a pad because of the big aperture cutout. This is probably not flagged by DRC, but such exposed copper is an invitation for shorts during manufacturing. Note that âjust coveredâ is also not enough. masks will shift a bit during manufacturing and you have to build in tolerances for that.
Here a closeup of:
When highlighting the track segment, you clearly see an overlap of the clearance of that track with the copper of the track going to pin7.
Then there is âTrack too close to through holeâ.
This is related to putting two THT pads on top of each other, and possibly by the way you defined the pads.
With one of the pads, I changed the small pad to a THT pad with copper on both sides, and the other to an SMT pad on the bottom and rand DRC again, and the âTrack too close to through holeâ error is gone for that pad. Note that the small pad on the front is now yellow, which indicates a THT pad.
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No itâs not, an aperture pad is a pad that is only defend on a non-copper layer and does not have a pad number.
You also do not need aperture pads here. By using a THT pad with small diameter, and a bigger SMT pad on the bottom you can use the default settings for the solder mask and the big exposed cutouts are gone and copper from other nets (if nearby) is covered.
Here a screenshot from the 3D viewer from the modified pad6 as described in my previous post.
Thanks paulvdh. It actually isnât as bad as you think. The real issue has been addressed by eelik. All the other issues you mentioned do not exist. I can say that because, having assured myself that I was not concerned about what KiCad was complaining about, I have had the boards fabricated without any problems - all 7 of them for the price of one. Winnerđ
< sigh >
Do you really mean that two hours from my message you had fixed the problems and now have the ready made working boards in your hand?
Whether or not a manufacturer accepts those several boards in one go is of course their own business, we just hope there hasnât been any misunderstanding.
You should never just ignore clearance errors unless you really know they canât be avoided for some very specific reason. You can for example make some track segments narrower or maybe change some clearance values depending on the manufacturerâs recommendations, but donât just leave the clearance DRC errors there.
At least some of the problems Paul mentioned of course go away when the pads are properly defined, but it requires taking care of the mask (and paste) layers, too.
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No, and I did not just ignore KiCad. I manually checked all the things it flagged up and decided I had no issues with them. So I ordered my boards days ago while I quietly resolve how to not get those errors from KiCad. I think we are there now with your help. Yep, I indeed have the all singing, all dancing, working boards in my hand.
This is a very naive approach to working with KiCad, (and also for programming and other tasks). What if you change a few small things and then want to order some more PCBâs? Are you going to carefully check all error messages again, or do you just think: âMeh, I already checked thoseâ. It is also completely unusable when projects get bigger and more complex.
All the errors I pointed out are real issues in your project, and I gave suggestions on how you can fix them all, and get the project free of DRC errors. Also, if you put in some effort to learn the more subtle parts of KiCad, you can avoid making all these DRC errors in the first place, and it would not take much time for the PCB design itself (Just a bit for the learning curve).
Iâm not sure, because there are so many (47) DRC errors in the project, but from what Iâve seen of the project there is no special treatment needed for the mask layers.
I meant the stacked pads, as you already pointed out. Itâs possible to create too large mask opening so that DRC is error free. This is improbable if the pads are designed from scratch like you and me told, but if they are just modified from the original, at least I got too large mask opening.
The way I modified them, the THT pad has a âdiscâ on both sides, and the large pad becomes a THT pad with both copper and mask only on the backside, and tha large clearance is gone. See the last picture I posted where I modified pad nr. 6, while pad 7 still has the large hole in the solder mask.
But you may also define this as âtaking care of mask & paste layersâ.
I think you are being needlessly judgemental here Paul (with good intentions no doubt). If you read all the post, you will understand that all issues with this design are now resolved. Perhaps not in the order you would, but resolved nonetheless. So there are no âWhat if you change a few small thingsâŚâ problem.
Nope.
We clearly have a different opinion of what âissuesâ are.
For me itâs very simple. DRC is there to help you, and a PCB should be DRC error free.
For a very simple PCB such as this you already have 47 DRC errors.
Now have a look at A64-OlinuXino, which is the first project on: https://www.kicad.org/made-with-kicad/
(The whole project is on github)
With the way you are working, a PCB of that complexity would have thousands of DRC errors, which would make DRC unusable.
A long time (30+ years) ago, while writing C programs I had a similar attitude. I read through all the compiler warnings and error messages and disregarded most of them. There were also a few I did not really understand, but they were just a few of the many. Later I learned more about programming, what the error messages meant and how to fix them. For some of the error messages, it is jumping though a loophole to make the compiler happy, but even for those it is worth to fix them, just to make the more important errors more visible. Long lists of error messages make the whole error checking unusable. Fixing the error messages also helped me to become a better programmer
Also:
Some of the error messages are for clearance violations. With the default settings KiCad wonât even let you make these errors, which means youâve disabled this in the interactive router settings, and this also implies you can not use important parts of the interactive router such as the âshove modeâ.
Iâm not trying to be judgemental here, just trying to share my experience. If you learn to work with KiCad and learn to use itâs features you will design better PCBâs, and design them quicker.
Itâs also part of my personality.
I easily get confused by conflicting information. In your schematic for example you have connected: 
to: 
and the only way for me to get over it is to remove such inconsistencies.
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One trick to have âpadstacksâ is to edit custom footprints âby handâ, opening the kicad_mod file with a text editor and adding the layers you want it to be in (In1.Cu In3.Cu, etc). No need to duplicate pads. An example of this can be seen in https://gitlab.com/openventilator/openventilator
Yeah, uummm, did you want everyone to read everything in that link?
Here a more specific example: https://gitlab.com/openventilator/openventilator/-/blob/master/CPU_RB0505/GR106772-A.pretty/VIA-091X03-VE_110001.kicad_mod
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