I love using KiCAD for my retro-hobby computer projects — some originals and some that are reproductions of long ago products. My question may span forum areas but I thought I’d start here. Admin, feel free to move it if I picked wrong.
My current project is a reproduction of an S100 video board from 1984. Very few had been made and the schematic copies available are generally of poor quality. I’ve done two prototypes and neither work after extensive debugging of obvious issues. I have access to an original board so I thought I’d ohm-out each net to confirm the schematics. It’s a dense board (4-layer, 10”x5”, 67 ICs).
So what I’m looking for is a way to get an easy to navigate net list that I can use to check-off nets as I go. Ideally I’d want something like “{device}.{pin} → …” where it shows where that pin goes. Does anyone have a recommendation for something like this?
But that VDP thing only counts around 33 IC’s. There seems to be a lot of history in that S-100 bus, but my preference is leave all that behind and put it all in a single uC.
In KiCad, you can export the netlist to a text file with: **Schematic Editor / Export / Netlist. Several different formats are supported. There is also a button for Add Generator, so apparently there is support for more formats, probably you can create your own format, but I never looked into that.
Another option is to work with net colors. When you go to Appearance Manager / Nets (tab) on the right side of the PCB editor, then you can enable net colors and use different colors to mark your nets (or use a specific color for nets you have checked.
You can also work with netclasses. In the schematic editor you can assign nets to net classes, so you can make a special netclass for nets you have checked. You can also assign a special color to that netclass. And this can also be combined with the net highlight function under the backtick key.
Paul — it’s actually the Lomas ColorMagic board which is nominally MS-DOS compatible. Think of it as the IBM CGA card but in an S-100 format (much smaller than a full-sized ISA card) and using five PALs to reduce the chip count.
When I get home I’ll look into the generator. This is really a bulk analysis exercise because I’ve run out of things to check. The last is to walk nets on the original board and compare to the nets generated by KiCAD. I’ve eliminated the chips as the issue because I’ve done a total swap with the prototype so it has to be a difference between the board itself and the drawn schematics.
Quite a job to reproduce that. It brings back memories from when I was bulk-desoldering TTL IC’s from old PCB’s of that era with a heat gun. Of the several thousand IC’s I desoldered, I re-used maybe 5. Still have the rest laying in some cabinet sorted by number.
These days it makes more sense to me put it all inside a small FPGA. But I do not really understand the retro-computing community. To each his own I guess.
Does this mean you have an actually re-created prototype that does not work? Debugging with a logic analyzer may make more sense. How do you know whether the PAL’s are still funcional? Soldering or etching faults, etc.
Paul — it can certainly be done in an FPGA but since all of the chips are still available, a recreation was attempted, partially for preservation purposes.
It’s a very long story at this point but I had the schematic redrawn maybe 18 months ago pending reversing the PALs manually. No equations were ever published; security bits set, so they were recreated by brute force. New PALs were programmed and tried in the original board and the board works as expected.
I’ve built a board and I’m saying it doesn’t work because I don’t get video output. I’m convinced there is an anomaly in the schematic. There are unpublished revisions to the board (jumpers and drill-outs) and a single line on a flip flop that should go somewhere per the schematic but is seemingly open on the original board. The clocking seems to work. So, maybe it’s more accurate to say that some of it works but some of it doesn’t.
I have only a small logic analyzer which I have not yet tried but that’s a good idea. No logic traces were published but maybe I could use the IBM docs as a guide since the circuit is similar.
Given the poor schematic quality and the ECOs to the board I was going to undertake a net-based comparison between the actual board and my schematic redraw so as to eliminate transcription errors. I’ve found one or two through manual work and made changes to the test article but that hasn’t helped.
If its purely to check your reverse engineered design then you can also take a look at the Interactive Html Bom plugin (directly available in KiCad’s Plugin manager).
Some years ago someone tried to give me a logic analyzer from around that era. Built in CRT, a few hundred channels, heavy and obsolete. I did not want it, I think it got scrapped. I guess these old beasts turn up every now and then on ebay.
I do have a few of the Saleaeaea clones which I use with Sigrok / Pulseview. It is also possible to use a generic Cypress Cy7C68013A, and then use it with 16 channels (The only difference for sigrok is the contents of the EEprom on the board), but bandwidth suffers even further. I also bought a Kingst LA2016 (16 channels 200MHz) for just over EUR100 and it does work with the latest nigtly of Sigrok / Pulseview, but I have only done a few short tests. I do not know how stable it is. Quite sad that the Sigrok project is getting so little attention lately.
(Oh, the Kingst LA2016 also works with it’s own software on Linux).
Debugging with a logic analyzer (or oscilloscope) is easiest to start if you combine some small custom programs For example with a simple loop that outputs counter values on the databus, you can check whether the databus reaches each IC it should reach. Another trick is to hardcode the databus to the NOP instruction, this forces the cpu to walk through all it’s addresses, and thus you can check whether addressing works. And with even a handful of channels you can verify all sorts of timing. You don’t have to hook up the whole system to the logic analyzer at the same time.
I downloaded it and started using it. So far, it’s great, but I just discovered you needed to check “nets” for the nets to show. Can’t wait to start testing with this.
The interactive BOM tool is fantastic. I identified four connections (on two different flip-flops) in which the actual board diverges from the schematic. Still need to sus out why, but it’s an amazing tool.
Did you run DRC? If you first update the PCB and then run DRC, then KiCad should detect all discrepancies between the schematic and the PCB, and give you a handy list with all the differences it found. Clicking on the items in that list also directly pans to that part on the PCB.
Sometimes it helps to use a different tool and approach a problem from another angle to find bugs. Does Interactive HTML BOM have functions that are not in KiCad but would be nice to have in KiCad to locate problems?
