DRC Help for new beginner

Layout
1

Hey !

Im very new to Kicad, and i need some help to solve my DRC.
I have a thousand clearance errors and im not sure how to solve it.

Ive added a picture and the drc log.

Would really appreciate your help!

** Found 32 DRC violations **
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(165,5700 mm, 55,3000 mm): Track [GND] on F.Cu, length 0,6259 mm
@(-4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(165,5700 mm, 55,9259 mm): Track [GND] on F.Cu, length 0,6260 mm
@(-4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,1506 mm)
Rule: netclass ‘Power’; Severity: error
@(157,0108 mm, 56,5519 mm): Track [GND] on F.Cu, length 1,8105 mm
@(4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(156,9300 mm, 55,3000 mm): Track [GND] on F.Cu, length 1,1712 mm
@(4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(165,5700 mm, 55,9259 mm): Track [GND] on F.Cu, length 0,7156 mm
@(-4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0662 mm)
Rule: netclass ‘Power’; Severity: error
@(156,9300 mm, 56,4712 mm): Track [GND] on F.Cu, length 0,0001 mm
@(4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,1506 mm)
Rule: netclass ‘Power’; Severity: error
@(157,0108 mm, 56,5519 mm): Track [GND] on F.Cu, length 1,3692 mm
@(4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0662 mm)
Rule: netclass ‘Power’; Severity: error
@(156,9301 mm, 56,4712 mm): Track [GND] on F.Cu, length 0,1141 mm
@(4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,1469 mm)
Rule: netclass ‘Power’; Severity: error
@(165,5700 mm, 56,5519 mm): Track [GND] on F.Cu, length 1,6617 mm
@(-4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,1690 mm)
Rule: netclass ‘Power’; Severity: error
@(165,0640 mm, 56,4319 mm): Track [GND] on F.Cu, length 1,0640 mm
@(-4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(165,5700 mm, 51,5000 mm): Track [GND] on B.Cu, length 0,6259 mm
@(-4,3200 mm, -0,0500 mm): Polygon on B.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(156,9300 mm, 51,5000 mm): Track [GND] on B.Cu, length 3,8000 mm
@(4,3200 mm, -3,8500 mm): Polygon on B.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(165,5700 mm, 52,1259 mm): Track [GND] on B.Cu, length 3,1741 mm
@(-4,3200 mm, -3,8500 mm): Polygon on B.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,1544 mm)
Rule: netclass ‘Power’; Severity: error
@(163,0575 mm, 54,0406 mm): Track [/VBUS] on F.Cu, length 2,8650 mm
@(-4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,1225 mm)
Rule: netclass ‘Power’; Severity: error
@(165,9225 mm, 54,0406 mm): Track [/VBUS] on F.Cu, length 6,7524 mm
@(-4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(165,5700 mm, 55,3000 mm): PTH pad S1 [GND] of USB-C1
@(-4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(165,5700 mm, 55,3000 mm): PTH pad S1 [GND] of USB-C1
@(-4,3200 mm, -3,8500 mm): Polygon on B.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(156,9300 mm, 55,3000 mm): PTH pad S2 [GND] of USB-C1
@(4,3200 mm, -3,8500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(156,9300 mm, 55,3000 mm): PTH pad S2 [GND] of USB-C1
@(4,3200 mm, -3,8500 mm): Polygon on B.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(165,5700 mm, 51,5000 mm): PTH pad S3 [GND] of USB-C1
@(-4,3200 mm, -0,0500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(165,5700 mm, 51,5000 mm): PTH pad S3 [GND] of USB-C1
@(-4,3200 mm, -0,0500 mm): Polygon on B.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(156,9300 mm, 51,5000 mm): PTH pad S4 [GND] of USB-C1
@(4,3200 mm, -0,0500 mm): Polygon on F.Cu
[clearance]: Clearance violation (netclass ‘Power’ clearance 0,2000 mm; actual 0,0000 mm)
Rule: netclass ‘Power’; Severity: error
@(156,9300 mm, 51,5000 mm): PTH pad S4 [GND] of USB-C1
@(4,3200 mm, -0,0500 mm): Polygon on B.Cu
[starved_thermal]: Thermal relief connection to zone incomplete (zone min spoke count 2; actual 1)
Local override; Severity: error
@(124,0000 mm, 47,5000 mm): Zone [GND] on F.Cu and 1 more
@(177,5950 mm, 68,3900 mm): PTH pad 6 [GND] of J1
[solder_mask_bridge]: Front solder mask aperture bridges items with different nets
Rule: board setup solder mask min width; Severity: error
@(-4,3200 mm, -3,9500 mm): Polygon on F.Mask
@(165,5700 mm, 55,3000 mm): Track [GND] on F.Cu, length 0,6259 mm
[solder_mask_bridge]: Front solder mask aperture bridges items with different nets
Rule: board setup solder mask min width; Severity: error
@(-4,3200 mm, -0,1500 mm): Polygon on F.Mask
@(165,5700 mm, 51,5000 mm): PTH pad S3 [GND] of USB-C1
[solder_mask_bridge]: Front solder mask aperture bridges items with different nets
Rule: board setup solder mask min width; Severity: error
@(4,3200 mm, -3,9500 mm): Polygon on F.Mask
@(156,9300 mm, 55,3000 mm): Track [GND] on F.Cu, length 1,1712 mm
[solder_mask_bridge]: Front solder mask aperture bridges items with different nets
Rule: board setup solder mask min width; Severity: error
@(4,3200 mm, -0,1500 mm): Polygon on F.Mask
@(156,9300 mm, 51,5000 mm): PTH pad S4 [GND] of USB-C1
[solder_mask_bridge]: Rear solder mask aperture bridges items with different nets
Rule: board setup solder mask min width; Severity: error
@(-4,3200 mm, -3,9500 mm): Polygon on B.Mask
@(165,5700 mm, 52,1259 mm): Track [GND] on B.Cu, length 3,1741 mm
[solder_mask_bridge]: Rear solder mask aperture bridges items with different nets
Rule: board setup solder mask min width; Severity: error
@(-4,3200 mm, -0,1500 mm): Polygon on B.Mask
@(165,5700 mm, 51,5000 mm): Track [GND] on B.Cu, length 0,6259 mm
[solder_mask_bridge]: Rear solder mask aperture bridges items with different nets
Rule: board setup solder mask min width; Severity: error
@(4,3200 mm, -3,9500 mm): Polygon on B.Mask
@(156,9300 mm, 51,5000 mm): Track [GND] on B.Cu, length 3,8000 mm
[solder_mask_bridge]: Rear solder mask aperture bridges items with different nets
Rule: board setup solder mask min width; Severity: error
@(4,3200 mm, -0,1500 mm): Polygon on B.Mask
@(156,9300 mm, 51,5000 mm): Track [GND] on B.Cu, length 3,8000 mm

** Found 0 unconnected pads **

** Found 0 Footprint errors **

** End of Report **

image

2

KiCad version?

From texts it make me suppose that a problem is/are Polygon/s on Cu layers. You should use Zones.
From picture it looks that you used Zones.
So I’m not sure of anything.
I don’t know if KiCad in DRC uses word Polygon instead of Zone.
Didn’t used KiCad for few months and I don’t have V8 installed yet.

Edit:
In your DRC report Polygon have no net associated with it so I suppose you have from somewhere Polygon(s) with no net and they are shorted (clearance 0) with correctly routed tracks.

3

Welcome @jacobwessmark

Not only Kicad version

but also operating system.

Find your information by opening Kicad > Help > About Kicad, Top RH corner click “Copy Version …”
Then Paste into a post on this forum.

4

I see lots of messages about Polygons, on Cu and Mask layers. You should explain what you are trying to do with those polygons that are causing polyproblems.

5

Hey! I’ve added the info about my version.

I’ve used Freerouting and I have used zoned to create a GND plane.
I took the fill away, did the DRC and still got most of the faults.

I just want to connect the usb-c for power to the board period, its a very simple board.

Application: KiCad x64 on x64

Version: 7.0.9, release build

Libraries:
wxWidgets 3.2.3
FreeType 2.12.1
HarfBuzz 8.2.1
FontConfig 2.14.2
libcurl/8.4.0-DEV Schannel zlib/1.3

Platform: Windows 11 (build 22631), 64-bit edition, 64 bit, Little endian, wxMSW

Build Info:
Date: Nov 5 2023 19:26:40
wxWidgets: 3.2.3 (wchar_t,wx containers)
Boost: 1.83.0
OCC: 7.7.1
Curl: 8.4.0-DEV
ngspice: 41
Compiler: Visual C++ 1936 without C++ ABI

Build settings:
KICAD_SPICE=ON

6

hm,
I downloaded another footprint/symbol from snapeda and all the problems are gone :slight_smile:

Thanks!

7

At first (2017) I copied some KiCad symbols to my library to see how they are defined, but since then I define all my symbols myself. Footprints I copy from KiCad library and modify a little.
I have never looked for any footprint in any other source than KiCad. I think that searching takes more time than just doing it (starting from similar enough other footprint). Think - how much time you lost by taking not KiCad made footprint.

8

In addition,

you should not stick to KiCad V7.0.9. Last February KiCad V8 was released, and works quite well, even though there are still some issues with plugins that have not been updated for V8 yet. If you don’t want to upgrade to V8 yet, then you should at least go to V7.0.12 Increments in the third number are bug fix releases, so higher numbers work better :slight_smile: