Pad is marked as N/C in the schematic, but there are air wires between the pins and the DRC complains they are unconnected.
I can see this is going to be an issue if the part is used as a jumper as well. It happens not to be in this case.
Pads with the same number must be connected. Always. If you do not want that than give every pad a unique number and use a symbol specifically designed for your component.
It seems at best odd when a pin specifically marked as non-connected requires connection to pass DRC.
DRC does not know about the schematic side markings. It knows there are 4 pads with the same netname. This means they need to be connected.
That is indeed an unfortunate oversight.
Not really. In a lot of other cases this can be used for getting powerful results. Take for example a footprint for a QFN footprint with exposed pads and thermal vias. Such a thing would not be possible without that feature.
I don’t follow, how would paying attention to no connect prevent the use of exposed pads and thermal vias?
The no connect thing is there to tell ERC to shut up. It has no other function. The netlist tells pcbnew that there is a symbol with one pin of pad number 1 but not connected to anything else. It gives that single pin a net name as every pin must be assigned one.
pcbnew then reads the netlist and discovers it needs footprint x. I teads that footprint and assignes the net given in the netlist to the pad number 1. DRC then discovers 4 pads with that pad number. It tells you that they are not connected.
As an inteilgent being you are able to identify this as either a false positive or a real issue. In this case the real issue is that you used a special feature of kicad (namely using the same pad number multiple times -> resulting in them being always connected) in an instance where you probably should not have done that.
In my previous post i detailed why this special feature exists. And in the post before that i gave you the solution for your problem.
I realize how it works and the I understand the suggested workarounds.
I’m suggesting that the N/C information should be passed on to the layout so it does not report false positives. It should ‘know’ that connections are not required to no connect pins.
I think this is, as I said previously, an oversight in the design.
Using the workarounds requires either accepting DRC violations (not in general a good idea), polluting the schematic with uneccessary connections (I think that’s also not a great idea) or making multiple symbols for the same part (also a bit a maintenance headache).
Another workaround might be during the update from schematic (or netlist load), I think there is a switch to automatically delete/ignore nets with a single pin. As long as you don’t have a feature that requires this functionality (like the thermal pad example that Rene states) it should give you your expected result. (Note, I haven’t tested this myself, so I may be speaking out of my sitting organ.)
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