Drag and shove performing worse on v6.0.1

Hi!

A am excited for the new release, but after using it a while I noticed that the most important function(and the one that I use the most) is not working as good on V6 compared to the previous V5 release.

Most noticable is the fact that quite often when I start draggind a track(with “D” hotkey), the app refuses to shove the nearby traces and vias even though there is plenty of space. Also the previos version used to break straight sections into smaller ones with 45 degree angles to shove it more efficienty.

I played around with the interactive router settings but it seems that I cannot restore the functionality to where it was before.

Does anybody have similar problems or know any potential solutions?

Thanks!

I noticed the same. Up to now i blamed it on my 12yo PC (WIN10), and/or low performance graphic-card. I only tried PCB that were updated from V5.

I think some of the recent commits to 6.0 Testing since 6.0.1 are related to this, have you tried the latest 6.0.x Testing build?

Yes, I skipped 6.0.0, I’m using 6.0.1.

Hi,

An example design (or a video showing the issue) would greatly help us fixing it.

Tom

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On our designs we needed to decrease Copper to hole Clearance.
Not sure if there is a bug or it was just a matter of setting it up correctly.

The question was about 6.0.x Testing build - means something done (build) later than 6.0.1.
I don’t know any more as I didn’t used V6 yet (I still use Win7 PC).

@twl I believe similar issues are reported here:

I can confirm there are situations where the router prevents Shove operation from being performed, but individual segments can be moved (i.e. there’s nothing blocking the segments, but they can’t be pushed as a whole).

I tried it and it helps a lot.

Also I’m pretty sure that’s a bug and it seems that the software doesn’t differentiate between holes and vias. And while routing it respects copper-copper clearance only, but when you try to drag afterwards it is stuck because collision with the copper-hole clearance rule is found.

The problem is that the manufacturer I plan to use treats vias and holes differently and on my board I have a footprint that needs 2 holes for aligment purposses. So if I decrease copper-hole clearance I’ll break the manufactorer’s design rules.

Probably I’ll continue routing with this workaround for now and anticipate a fix.

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