The first two refer to this image. The silkscreen outline of U2 intersects with a silkscreen outline of a Raspberry Pi outline (the long horizontal line that intersects the U2 outline). The Pi plugs into the board using a 2x40 connector. I wanted to have an outline of the Pi board while laying out the pcb. I guess I could remove it, but it will be helpful when plugging in the Pi board on the pcb to insure the correct orientation.
The last warning refers to pin 7 of U2 - I am not sure what it means.
Finally, warnings 3 & 4 refer to this picture. Q1 is a MOSFET, and I moved the drain connection a bit to allow the large current traces to connect to the drain and source. I also added an outline of the heat sink attached to Q1 so when I placed the components I made sure it would all fit. I could again remove the heat sink outline, but it is still useful when mounting the MOSFET to know the correct orientation.
When you send gerber files to a fab with silkscreen overlapping with pads, one of at least three things can happen:
They make the PCB as you specified it. and you probably have to scrape the silkscreen off the pads before you can solder on the pads.
They silently modify your data and remove the parts of the silkscreen that overlap with the pads.
They donât manufacture your PCB and may ask you how you want them to handle it and this leads to extra delays.
You may also have different results when you send the same files to the same fab, depending on who handles your files and what mood they are in.
The simplest way to âfixâ this is to clip the silkscreen in KiCad yourself during export of the Gerber files. A more robust way is to modify the lines so they donât overlap with pads at all, or move them to another layer (maybe a fab layer?)
The Fab (Fabrication) layers are for making notes for fabricating and assembling the PCB. By default (most of?) KiCadâs footprints put information on the fab layer, just as on the silkscreen (also called âLegendâ).
Not exactly âjust asâ. Drawing at Fab layer you will not have at PCB.
But you should not be so worry about:
There are only 2 ways of inserting and to show orientation you need not to have the whole silkscreen rectangles.
For many years (since 80s til 2017 when I started to use KiCad) we didnât used silkscreen at our PCBs at all and nothing strange never happened.
The program we used had no Courtyard layers and we used silkscreen to have outline + pin 1 marking. It was not to be marked at PCB but in pdf documentation. Once by my mistake the silkscreen layer was send to PCB manufacturer and we get all pin1 crossed with white line.
Now I use Courtyard layers for marking pin 1 in documentation (I switch off DRC warnings being result of it). I have silkscreen rectangles not inside courtyard rectangles but exactly as they are so when I place footprints touching each other I also get some silkscreen warnings that I switch off.
Personally I ignore them and switch the violations off ! I inspect the PCB by eye and if the silk looks bad I mess around with it otherwise I leave it be However thats just me but I pay very little attention to âcourtyardsâ and stuff and I let the DRC handle important things.
However thats just me but I pay very little attention to âcourtyardsâ and stuff and I let the DRC handle important things.